• Title/Summary/Keyword: $P^+$ silicon

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Fabrication of Flexible Passive Matrix by Using Silicon Nano-ribbon (실리콘 나노리본을 이용한 유연한 패시브 매트릭스 소자 제작)

  • Shin, Gun-Chul;Ha, Jeong-Sook
    • Korean Chemical Engineering Research
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    • v.49 no.3
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    • pp.338-341
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    • 2011
  • Thin silicon ribbon was used for fabricating flexible silicon p-i-n junction devices, consisting of 100${\times}$100 arrays of pixels in 1 inch on the diagonal. Those passive matrix devices exhibited the rectification ratio $>10^{4}$ owing to smaller cross-talking current than that of p-n junction devices. P-i-n devices fabricated on silica/silicon substrates are easily detached by treatment with hydrofluoric acid and are subsequently transferred onto both PDMS and flexible PET film.

Highly Stabilized Protocrystalline Silicon Multilayer Solar Cells (고 안정화 프로터결정 실리콘 다층막 태양전지)

  • Lim Koeng Su;Kwak Joong Hwan;Kwon Seong Won;Myong Seung Yeop
    • 한국신재생에너지학회:학술대회논문집
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    • 2005.06a
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    • pp.102-108
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    • 2005
  • We have developed highly stabilized (p-i-n)-type protocrystalline silicon (pc-Si:H) multilayer solar cells. To achieve a high conversion efficiency, we applied a double-layer p-type amorphous silicon-carbon alloy $(p-a-Si_{1-x}C_x:H)$ structure to the pc-Si:H multilayer solar cells. The less pronounced initial short wavelength quantum efficiency variation as a function of bias voltage proves that the double $(p-a-Si_{1-x}C_x:H)$ layer structure successfully reduces recombination at the p/i interface. It was found that a natural hydrogen treatment involving an etch of the defective undiluted p-a-SiC:H window layer before the hydrogen-diluted p-a-SiC:H buffer layer deposition and an improvement of the order in the window layer. Thus, we achieved a highly stabilized efficiency of $9.0\%$ without any back reflector.

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Silicon thin film and p-n junction diode made by $CO_2$ laser-induced CVD method ($CO_2$ Laser-induced CVD법에 의한 Silicon박막 및 p-n 접합 Silicon제작)

  • Choi, H.K.;Jeong, K.;Kim, U.
    • Proceedings of the KIEE Conference
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    • 1989.07a
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    • pp.662-666
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    • 1989
  • Pure mono Silane(Purity: 99.99%) was used as a thin film source and [$SiH_4$ + $H_2$ (5%)] + [$PH_3$ + $H_2$(0.05%)] mixed dilute gas was used for p-n junction diode. The substrate was P-type silicon wafer (p=$3{\Omega}$ cm) with the direction (100). The crystalline qualities of deposited thin film were investigated by the X-ray diffraction, RHEED and TED patterns and the voltampere characteristics of p-n junction diode was identified by I-V curve.

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Optically-Triggered Silicon P-I-N Switches with Planar and Anistropically-Etched Structures (플레나 및 이방성 에칭 구조를 갖는 실리콘 p-i-n 광 스위치)

  • Min, Nam-Ki;Lee, Seong-Jae;Henderson, H.T.
    • Proceedings of the KIEE Conference
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    • 1997.07d
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    • pp.1261-1263
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    • 1997
  • Two kinds of optically-triggered p-i-n switches with planar and V-groove structures have been fabricated with gold-doped silicon. The V-groove device exhibits a higher threshold voltage and is more sensitive to light. The minimum optical power indicates that a certain minimum illumination is required to optically turn on the silicon p-i-n devices.

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A new formation method of silicon $p^+$-n-$n^+$junctions by VDH-implanter (VDH이온주입기에 의한 실리콘 $p^+$-n-$n^+$접합의 새로운 형성법에 관한 연구)

  • 최원은
    • 전기의세계
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    • v.22 no.5
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    • pp.5-11
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    • 1973
  • A new method of forming silicon p$^{+}$-n-n$^{+}$ junctions has been attempted by using the VDH-Implanter (Vacuum Discharge and Heating). Each of p$^{+}$-n and n-n$^{+}$ junctions was formed on both sides of an n-type silicon substrate by means of predeposition of each dopant and their bombarding due to rarefied air ions together with the preheating of the substrate in the implanter. The recifying principle of the p$^{+}$-n-n$^{+}$ junctions is thought to be based on the theory of double injection. The I-V characteristic of the diode has shown that it has a fairly high forward current density with the desirable rise due to vary low voltage though the reverse voltage is a little low on account of the low resistivity of the silicon substrate.n substrate.

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Estimation of the Stress Profile of $p^+$ Silicon Films Using Stress Measurement Structures (응력측정 구조를 이용한 $p^+$ 박막의 응력분포 추정)

  • Yang, E.H.;Yang, S.S.;Park, E.J.;Yoo, S.H.
    • Proceedings of the KIEE Conference
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    • 1994.11a
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    • pp.413-415
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    • 1994
  • In this paper, a new technique for quantitative estimation of the stress profile along the depth of $p^+$ silicon films is presented. The $p^+$ silicon cantilevers with various beam thickness and a rotating beam supported by two cantilevers are used for estimating the stress profile of the films. The average of the residual stress distribution is estimated to be 50MPa. Most of $p^+$ silicon films are subjected to the tensile stress, except the region near the frontside.

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Estimation of the impurity segregation in the multi-crystalline silicon ingot grown with UMG (Upgraded Metallurgical Grade) silicon (UMG(Upgraded Metallurgical Grade) 규소 이용한 다결정 잉곳의 불순물 편석 예측)

  • Jeong, Kwang-Pil;Kim, Young-Kwan
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.18 no.5
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    • pp.195-199
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    • 2008
  • Production of the silicon feedstock for the semiconductor industry cannot meet the requirement for the solar cell industry because the production volume is too small and production cost is too high. This situation stimulates the solar cell industry to try the lower grade silicon feedstock like UMG (Upgraded Metallurgical Grade) silicon of 5$\sim$6 N in purity. However, this material contains around 1 ppma of dopant atoms like boron or phosphorous. Calculation of the composition profile of these impurities using segregation coefficient during crystal growth makes us expect the change of the type from p to n : boron rich area in the early solidified part and phosphorous rich area in the later solidified part of the silicon ingot. It was expected that the change of the growth speed during the silicon crystal growth is effective in controlling the amount of the metal impurities but not effective in reducing the amount of dopants.

Fabrication of Ordered One-Dimensional Silicon Structures and Radial p-n Junction Solar Cell

  • Kim, Jae-Hyun;Baek, Seong-Ho
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.86-86
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    • 2012
  • The new approaches for silicon solar cell of new concept have been actively conducted. Especially, solar cells with wire array structured radial p-n junctions has attracted considerable attention due to the unique advantages of orthogonalizing the direction of light absorption and charge separation while allowing for improved light scattering and trapping. One-dimenstional semiconductor nano/micro structures should be fabricated for radial p-n junction solar cell. Most of silicon wire and/or pillar arrays have been fabricated by vapour-liquid-solid (VLS) growth because of its simple and cheap process. In the case of the VLS method has some weak points, that is, the incorporation of heavy metal catalysts into the growing silicon wire, the high temperature procedure. We have tried new approaches; one is electrochemical etching, the other is noble metal catalytic etching method to overcome those problems. In this talk, the silicon pillar formation will be characterized by investigating the parameters of the electrochemical etching process such as HF concentration ratio of electrolyte, current density, back contact material, temperature of the solution, and large pre-pattern size and pitch. In the noble metal catalytic etching processes, the effect of solution composition and thickness of metal catalyst on the etching rate and morphologies of silicon was investigated. Finally, radial p-n junction wire arrays were fabricated by spin on doping (phosphor), starting from chemical etched p-Si wire arrays. In/Ga eutectic metal was used for contact metal. The energy conversion efficiency of radial p-n junction solar cell is discussed.

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Fabrication and Properties of pn Diodes with Antimony-doped n-type Si Thin Film Structures on p-type Si (100) Substrates (p형 Si(100) 기판 상에 안티몬 도핑된 n형 Si박막 구조를 갖는 pn 다이오드 제작 및 특성)

  • Kim, Kwang-Ho
    • Journal of the Semiconductor & Display Technology
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    • v.16 no.2
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    • pp.39-43
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    • 2017
  • It was confirmed that the silicon thin films fabricated on the p-Si (100) substrates by using DIPAS (DiIsoPropylAminoSilane) and TDMA-Sb (Tris-DiMethylAminoAntimony) sources by RPCVD method were amorphous and n-type silicon. The fabricated amorphous n-type silicon films had electron carrier concentrations and electron mobilities ranged from $6.83{\times}10^{18}cm^{-3}$ to $1.27{\times}10^{19}cm^{-3}$ and from 62 to $89cm^2/V{\cdot}s$, respectively. The ideality factor of the pn junction diode fabricated on the p-Si (100) substrate was about 1.19 and the efficiency of the fabricated pn solar cell was 10.87%.

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Properties of the Amorphous Silicon Microbolometer using PECVD (PECVD 이용한 비정질 실리콘형 마이크로 볼로미터 특성)

  • Kang, Tai Young;Kim, Kyung Hwan
    • Journal of the Semiconductor & Display Technology
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    • v.11 no.4
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    • pp.19-23
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    • 2012
  • We report microbolometer characteristic with n-type and p-type amorphous silicon thin film. The n-type and p-type amorphous silicon thin films were made by PECVD. The electrical properties of n-type and p-type a-Si:H thin films were investigated as a function of doping gas flow rate. The doping gas used $B_2H_6/Ar$ (1:9) and $PH_3/Ar$ (1:9). In general, the conductivity of doping a-Si:H thin films increased as doping gas increase but the conductivity of a-Si:H thin films decreased as the doping gas increase because doping gas concentration increase led to dilution gas (Ar) increase as the same time. We fabricated an amorphous silicon microbolometer using surface micromachining technology. The fabricated microbolometer had a negative TCR of 2.3%. The p-type microbolometer had responsivity of $5{\times}10^4V/W$ and high detectivity of $3{\times}10^8cm(Hz)^{1/2}/W$. The p-type microbolometer had more detectivity than n-type for less noise value.