• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.1
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• pp.1-7
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• 2012

In this paper, An X-band solid state power amplifier(SSPA) for pulse compressed microwave signal with 60Watt power and power added efficiency(PAE) above 30% is described. Designed 60Watt high power amplifier(HPA) was implemented by cascade coupled amplifiers, and it is consisted on three stage drive amplifiers with internally matched GaAs FET and one stage main power amplifier with an internally matched GaN HEMT. The designed SSPA has performance with more than total power gain 37dB and output power 48dBm(60-W) in condition of frequency range $9.41{\pm}0.03GHz$, pulse period width under 1ms and duty cycle under 10%. The implemented SSPA can apply to high quality digital marine radar applications with pulse compression technique.

• Electrical & Electronic Materials
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• v.10 no.7
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• pp.692-699
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• 1997

The silicon doped $Al_{0.33}$G $a_{0.67}$As were grown by molecular beam epitaxy. The electroreflectance(ER) spectra of Schottky barrier Au/n-Al/suu x/G $a_{1-x}$ As have been measured at various modulation voltage( $V_{ac}$ ) and dc bias voltage( $V_{bias}$). From the observed Franz-Keldysh oscillations(FKO) peak, the band gap energy of the $Al_{x}$G $a_{1-x}$ As is 1.91 eV which corresponds to an Al composition of 33%. The internal electric field( $E_{i}$)of this sample is 2.96$\times$10$^{5}$ V/cm. As the modulation voltage( $V_{ac}$ ) is changed, the line shape of ER signal does not change but its amplitude varies linearly. The amplitude as a function of modulation voltage has saturated at 0.8 V. The internal electric field has decreased from 6.47$\times$10$^{5}$ V/cm to 2.00$\times$10$^{5}$ V/cm as the dc bias voltage( $V_{bias}$) increases from -3.5 V to +0.8 V. The values of built-in voltage( $V_{bi}$ ) and carrier concentration(N) determined from the plot of $V_{bias}$ from the plot of $V_{bias}$ versus $E_{i}$$^{2}$ are 0.855 V and 3.83$\times$10$^{17}$ c $m^{-3}$ , respectively.ively.y.y.y.

• Journal of the Korean Institute of Telematics and Electronics D
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• v.36D no.3
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• pp.66-74
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• 1999

InAlGaAs/InGaAs HBTs with the various emitter junction gradings(xf=0.0-1.0) and the modified collector structures (collector- I;n-p-n, collector-II;i-p-n) are simulated and analyzed by HMC (Hybrid Monte Carlo) method in order to find an optimum structure for the shortest transit time. A minimum base transit time($ au$b) of 0.21ps was obtainsed for HBT with the grading layer, which is parabolically graded from $x_f$=1.0 and xf=0.5 at the emitter-base interface. The minimum collector transit time($\tau$c) of 0.31ps was found when the collector was modified by inserting p-p-n layers, because p layer makes it possible to relax the electric field in the i-type collector layer, confining the electrons in the $\Gamma$-valley during transporting across the collector. Thus InAlGaAs/InGaAs HBT in combination with the emitter grading($x_f$=0.5) and the modified collector-III showed the transit times of 0.87 psec and the cut-off frequency (f$\tau$) of 183 GHz.

• Korean Journal of Materials Research
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• v.9 no.10
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• pp.1012-1017
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• 1999

Low resistance ohmic contacts to the Si-doped $\textrm{In}_{0.17}\textrm{Ga}_{0.83}\textrm{N}$(~$\times10^{19}\textrm{cm}^{-3}$) were obtained using the W metallization schemes. Specific contact resistance decreased with increasing annealing temperature. The lowest resistance is obtained after a nitrogen ambient annealing at $950^{\circ}C$ for 90 s, which results in a specific contact resistance of $2.75\times10^{-8}\Omega\textrm{cm}^{-3}$. Interfacial reactions and surface are analyzed using x-ray diffraction and scanning electron microscopy (SEM). The X-ray diffraction results show that the reactions between the W film and the $\textrm{In}_{0.17}\textrm{Ga}_{0.83}\textrm{N}$ produce a $\beta$-$W_2N$ phase at the interface. The SEM result shows that the morphology of the contacts is stable up to a temperature as high as $850^{\circ}C$. Possible mechanisms are proposed to describe the annealing temperature dependence of the specific contact resistance.

• Proceedings of the Optical Society of Korea Conference
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• 2000.02a
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• pp.256-257
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• 2000

유전체 덮개층을 이용한 impurity free vacancy disordering (IFVD) 기술에 의한 양자우물구조의 밴드갭 조절기술은 양자우물을 갖는 광소자의 제작 및 광소자들의 한판 집적에 광범위하게 적용되어 왔다$^{(1-3)}$ . IFVD 기술의 핵심은 유전체 덮개층의 종류 및 그 특성을 적절히 조절함으로써 양자우물의 밴드갭 및 굴절율을 양자우물 기판상에서 공간적으로 조절하는 기술에 있다. 이러한 목적을 위해 SiN$_{x}$ , SiO$_2$, SrF$_2$ 및 WN$_{x}$ 와 같은 많은 유전체 덮개층에 관한 실험들이 진행되었다 $^{(1-6)}$ . (중략)

• Bulletin of the Korean Chemical Society
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• v.26 no.1
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• pp.131-135
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• 2005

Gallium nitride (GaN) powders and nanowires were prepared by using tris(N,N-dimethyldithiocarbamato)gallium(III) (Ga(DmDTC)$_3$) and tris(N,N-diethyldithiocarbamato)gallium(III) (Ga(DeDTC)$_3$) as new precursors. The GaN powders were obtained by reaction of the complexes with ammonia in the temperature ranging from 500 to 1100 ${^{\circ}C}$. The process of conversion of the complexes to GaN was monitored by their weight loss, XRD, and $^{71}$Ga magic-angle spinning (MAS) NMR spectroscopy. Most likely the complexes decompose to $\gamma$ -Ga$_2$S$_3$ and then turn into GaN via amorphous gallium thionitrides (GaS$_x$N$_y$). The reactivity of Ga(DmDTC)$_3$ with ammonia was a little higher than that of Ga(DeDTC)$_3$. Room-temperature photoluminescence spectra of asprepared GaN powders exhibited the band-edge emission of GaN at 363 nm. GaN nanowires were obtained by nitridation of as-ground $\gamma$ -Ga$_2$S$_3$ powders to GaN powders, followed by sublimation without using templates or catalysts.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.287.1-287.1
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• 2016

Three-dimensional (3-D) semiconductor nanoarchitectures, including nano- and micro- rods, pyramids, and disks, are emerging as one of the most promising elements for future optoelectronic devices. Since these 3-D semiconductor nanoarchitectures have many interesting unconventional properties, including the use of large light-emitting surface area and semipolar/nonpolar nano- or micro-facets, numerous studies reported on novel device applications of these 3-D nanoarchitectures. In particular, 3-D nanoarchitecture devices can have noticeably different current spreading characteristics compared with conventional thin film devices, due to their elaborate 3-D geometry. Utilizing this feature in a highly controlled manner, color-tunable light-emitting diodes (LEDs) were demonstrated by controlling the spatial distribution of current density over the multifaceted GaN LEDs. Meanwhile, for the fabrication of high brightness, single color emitting LEDs or laser diodes, uniform and high density of electrical current must be injected into the entire active layers of the nanoarchitecture devices. Here, we report on a new device structure to inject uniform and high density of electrical current through the 3-D semiconductor nanoarchitecture LEDs using metal core inside microtube LEDs. In this work, we report the fabrications and characteristics of metal-cored coaxial $GaN/In_xGa_{1-x}N$ microtube LEDs. For the fabrication of metal-cored microtube LEDs, $GaN/In_xGa_{1-x}N/ZnO$ coaxial microtube LED arrays grown on an n-GaN/c-Al2O3 substrate were lifted-off from the substrate by wet chemical etching of sacrificial ZnO microtubes and $SiO_2$ layer. The chemically lifted-off layer of LEDs were then stamped upside down on another supporting substrates. Subsequently, Ti/Au and indium tin oxide were deposited on the inner shells of microtubes, forming n-type electrodes of the metal-cored LEDs. The device characteristics were investigated measuring electroluminescence and current-voltage characteristic curves and analyzed by computational modeling of current spreading characteristics.

• JSTS:Journal of Semiconductor Technology and Science
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• v.4 no.2
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• pp.117-123
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• 2004

A 30 nm $In_{0.7}GaAs$ High Electron Mobility Transistor (HEMT) with triple-gate has been successfully fabricated using the $SiO_2/SiN_x$ sidewall process and BCB planarization. The sidewall gate process was used to obtain finer lines, and the width of the initial line could be lessened to half by this process. To fill the Schottky metal effectively to a narrow gate line after applying the developed sidewall process, the sputtered tungsten (W) metal was utilized instead of conventional e-beam evaporated metal. To reduce the parasitic capacitance through dielectric layers and the gate metal resistance ($R_g$), the etchedback BCB with a low dielectric constant was used as the supporting layer of a wide gate head, which also offered extremely low Rg of 1.7 Ohm for a total gate width ($W_g$) of 2x100m. The fabricated 30nm $In_{0.7}GaAs$ HEMTs showed $V_{th}$of -0.4V, $G_{m,max}$ of 1.7S/mm, and $f_T$ of 421GHz. These results indicate that InGaAs nano-HEMT with excellent device performance could be successfully fabricated through a reproducible and damage-free sidewall process without the aid of state-of-the-art lithography equipment. We also believe that the developed process will be directly applicable to the fabrication of deep sub-50nm InGaAs HEMTs if the initial line length can be reduced to below 50nm order.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.10 no.1
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• pp.7-13
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• 2010

We have investigated effects of the rapid thermal annealing of GaN epilayers by molecular beam epitaxy in nitrogen atmosphere. The improvement of structural properties of the samples was observed after rapid thermal annealing under optimum conditions. This improvement in crystal quality is due to a reduction of the spread in the lattice parameter in epilayers. The annealing has been performed in a rapid thermal annealing furnace at $950^{\circ}C$. The effect of rapid thermal annealing on the structural properties of GaN was studied by x-ray diffraction. The Bragg peak shifts toward larger angle as the annealing time increases. As the thermal treatment time increases, FWHM(full width at half maximum) of the peak slightly increase with its decreases followed and it increases again. Results demonstrate that rapid thermal annealing did not always promote qualities of GaN epilayers. However, rapid thermal annealing under optimum conditions improve structural properties of the samples, elevating their crystal quality with a reduction of inaccuracy in the lattice parameter of the epilayers.

• Journal of the Microelectronics and Packaging Society
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• v.5 no.1
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• pp.45-54
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• 1998

본 연구에서는 열벽성장법에 의해 ZnSe 에피막을 GaAs 기판에 성장하고 double crystal x-ray diffractometer와 Photoluminescence (PL) 등의 장치를 이용하여 구조족, 광학 적 특성을 연구하였다. x-선 반치폭과 PL피크강도로부터 최적의 기판온도가 34$0^{\circ}C$임을 알 수 있었다. 또한 기판온도, 열벽부온도, 원료부온도, 성장시간등의 성장조건이 표면거칠기 성 장률, x-선 반치폭, PL 피크강도 등에 미치는 영향에 대하여 살펴보았다. 최적 성장조건하 에성장된 ZnSe 에피막의 x-선 반치폭은 149sec로 나타났는데 이는 HWE 성장법으로 성장 된 ZnSe 에피막에 대하여 보고된 수치 중 가장낮은 값이다. PL 스펙트럼에서 I2 피크와 DAP 피크의 강도는 높고, SA 피크의 강도는 낮다는 사실로부터 본 연구에서 성장된 ZnSe 에피막의 결정질이 매우 우수함을 확인하였다.