We have analyzed the reliability of failure models in circuit-switched networks. These models are grid topology circuit-switched networks, and each node transmits a packet to a destination node using a Flooding routing method. We have assumed that the failure of each link and node is independent. We have considered two method to analyze reliability in these models : The Karnaugh Map method and joint probability method. In this two method, we have analyzed the reliability in a small grid topology circuit switched network by a joint probability method, and comared analytic results with simulated ones. For a large grid enormous. So, we have evaluated the reliability of the network by computer simulation techniques. As results, we have found that the analytic results are very close to simulated ones in a small grid topology circuit switched network. And, we have found that network reliability decreases exponentially, according to increment of link or node failure, and network reliability is almost linearly decreased according to increment of the number of links, by which call has passed. Finally, we have found an interesting result that nodes in a center of the network are superior to the other nodes from the reliability point of view.

This paper proposes a nonlinear adaptive equalizer which is based on fuzzy rules and fuzzy inference of several affine mapping for the received channel data. The proposed nolonlinear adaptive equalizers with the significantly lower computational complexity. Also it can be applied to the on-line adaptation environments owing to its fast convergence characteristics and the lower computational load. When using the decision feedback vectors, this equaalizer can be easily realized in the form of the DFE structure with out the requirement for the perfect channel knowledge as in the case of the fuzzy adaptive filter.

For the efficient interconnection between SMDS and LAN, an interconnection protocol architecture in the router is proposed in this paper. A control method of xongestion which is produced by this interconnection of SMDS and LAN is also proposed. Especially, the SIP level 3 of SMDS is devided into CS-SIP3 sublayer and CLNAP sublayer in order to circumvent the problems which are producted by the protocol difference of two networks and to consider the interconnection with B-ISDN in the future. In this way, the interconnection of SMDS and LAN is transparentlly achieved through CLNAP layer, and the interconnection protocol architecture becomes simple. To test the performance of the router, amodel of interconnection protocol which is proposed by this paper is simulated using sliding window flow control. The simulation results show that the throughput of router is increased. The packet delay and the rate of packet discard are also decreased.

In this paper, we consider the leaky bucket parameter dimensioning problem in the presence of the cell delay variation(CDV) which arises at the customer premises network dud to the multiplexing with other traffic streams. We consider an ATM multiplexer in which a single CBR stream and several heterogeneous VBR traffic streams are multiplexed. Choosing an MMPP model for the bursty traffic streams, we derive an (MMPP+DD)/D/1/K queueing model for the evaluation of the CDV experienced by the CBR stream. We first evaluate the equilibrium queue length distribution embedded at tagged-cell arrival-time instants, based on whcih we calcuate the inter-cell time distribution and the distribution kof the number of tagged-cell departures in an arbitrary interval. Then we apply the analysis to the dimensionging problem of the leaky bucket parameters, examining how the employed traffic model affects the determination of the bucket size. Through numerical examples, we confirm that the Poisson traffic model can underestimate the bucket size, thus causing a considerable blocking probability for compliant use cells while the MMPP model can optimally design the bucket size which keeps the blocking probability under the target value.

A complete form of physical optics solution to the E-polarized diffraction by a composite of conducting and dielectric wedges is obtained by sum ov geometrical optics solution and edge-diffracted field. The diffraction coefficients of the edge-diffracted field are expressed in series of cotangent functions. The electric field patterns of the physical optics solution are plotted in figures.

Proximity-coupled open-end microstrip interconnections in bilevel planar structures are investigated through three-dimensional finite-difference time-domain(3D-FDTD) method. Three types of EMC (electromagnetically coupled) microstriplines are considered, collinear lines, transverse lines and modified EMC structure. From the analyzed results, it is found that these EMC interconnections have the coupling coefficient enough to interconnect lines in bilevel structures over a broad-band. The computed results of the modified EMC structure was compared with measurement from physical model and the computed results of via hole interconnection.

A new method is presented for the synthesis of lossy tapered transmission line having presecribed frequency characteristic in the passband. The theory of lossy case extends lossless cases suggested by Klopfenstein and others, and a special optimization process based on the Fourier transfrom pair and generalized Taylor's procedure is proposed for exact designs of frequency-dependent and distance-dependent lossy tapered line. The process is achieved by control of zero points of lobe-like input reflection coefficient. The validity of the suggested method is confirmed by synthesizing a lossy microstrip transformer and analyzing the simulation results.

A new DC drain-current model of GaAs MESFET with improved accuracy is proposed in this paper. The proposed model includes the decrease of current slope according to gate voltages. It is possible to represent a transconductance compression using the proposed model. It shows improved transconductance and output resistance in accuracy from the forward biased gate region to near the cutoff region. The wquaer error of saturation current is decreased by 46% compared with Statz model. The proposed model can be useful for the simulation of large-signal operation and harmonic distortion.

Evaluated are errors of the conformal mapping method in the analysis of a coplanar waveguides and asmmetric coplanar strips. The errors are mainly due to the negligence of fringe field effect after electrode structures are transformed to parallel electrodes. For the purpose of comparison, results of the conformal mapping(CM) method are compared with those of the successive over relaxation(SOR) method.

We fabricated the Pb$_{1-0.28{\alpha}}La_{0.28}TiO_{3}$ (PLT(28)) thin film successfully by using the sol-gel method and characterized it to evaluate its potential for being utilized as the capacitor dielectrics of ULSI DRAMs. In our sol-gel process, the acetates were used as the starting materials. Through the TGA-DTA analysis, we established the excellent fabrication conditions of the sol-gel method for the PLT(28) thin film. We obtained the dense and crack-free PLT(28) thin film of 100% perovskite phase by drying at 350$^{\circ}C$ after each coating and final annealing at 650$^{\circ}C$. Its electrical properties were measured from the planar capacitors fabricated on the Pt/Ti/SiO$_{2}$/Si substrate. By the P-E hysteresis measurement, its paraelectric phase was identified and its dielectric constant and leakage current density were measured as 936 and 1.1${\mu}A/cm^{2}$, respectively. Those electrical values indicate that the PLT(28) thin film is the most successful candidate for the capacitor dielectrics of ULSI DRAMs at the present.

Linwidth enhancement factor .alpha., linwidth, chirping and differential gain characteristics were measured and compared for each DFB-LDs containing active layers composed of bulk, MQW, and S-MQW, respectively. .alpha. of 6, 4 and 3.2 and chirping measured under 2.5Gbps modulation of 1.29nm, 0.67nm and 0.48nm were given for DFB-LDs of bulk, MQW and S-MQW active layers, respectively. And S-MQW has the largest differential gin of 2.4*10$^{-15}$ cm$^{2}$ (S-MQW) compared to the of 5.4*10$^{-16}$ cm$^{2}$(bulk) and 8.6*10$^{-16}$ cm$^{2}$(MQW). Linewidth enhancement facter .alpha. of less than 2 is expected with p-type modulation doped S-MQW DFB-LD.

A three-dimensional(3D) Monte Carlo simulator for boron ion implantation into <100>single-crystal silicon considering the mask structure has been developed to predict the mask-dependent impurity doping profiles of the implanted boron at low energies into the reduced area according to the trend of a reduction in the size of semiconductor devices. All relevant important parameters during ion implantation have been taken into account in this simulator. These are incident energy, tilt and rotation of wafer, orientation of silicon wafer, presence of native silicon dioxide layer, dose, wafer temperature, ion beam divergence, masking thickness, and size and structure of open window in the mask. The one-dimensional(1D) results obtained by using the 3D simulator have been compared with the SIMS experiments to demonstrate its capabilities and confirem its reliability, and we obtained relatively accurate 1D doping profiles. Through these 3D simulations considering the hole structure and its size, we found the mask effects during boron ion implantation process.

Three-dimensional simulator for thermal oxidation process is developed. The simulator is consisted by two individual module, one is analytic-model module and the other is numerical-model module. The analytic-model which uses simple complementary-error function guarantees fast calculation in prediction of multi-dimensional oxidation process. The numerical-model which is based on boundary element method (BEM), has a good accuracy and suitable for various process conditions. The results of this study show that oxide growth is retarded at the corner of hole structure and enhanced at the corner of island structure. These effects are reson of different distribution of oxidant diffusion and mask stress. The utility of models and simulator developed in this study is demonstrated by using it to predict not only traditional shape of LOCOS but also process effects in small geometry.

Strained multiple quantum well(SMQW) PBH-DFB-LDs emitting at 1.55$\mu$m wavelength has been fabricated using OMVPE and LPE crystal growth tecnique. Using the SMQW active layer, a linewidty enhancement factor of 2.65 was obtained at lasing wavelength and consequnently, packaged 42 modules showed a very low average chirp of 0.44nm at 2.5Gbps NRZ direct modulation. The 77 devices showed average threshold current of 8.72mA and average slope efficiency of 0.181 mW/mA, and single longitudinal mode operation with SMSR larger than 30dB up to 5mW. Among the 77 devices, standard deviation of lasing wavelength of 3.57nm was obtained owing to a good crystal growth uniformity.

The electrical stress of short channel polycrystalline silicon (poly-Si) thin film transistor (TFT) has been investigated. The device characteristics of short channel poly-Si TFT with 5$\mu$m channel length has been observed to be significantly degraded such as a large shift in threshold voltage and asymmetric phenomena after the electrical stress. The dominant degradation mechanism in long channel poly-Si TFT's with 10$\mu$m and 20$\mu$m channel length respectively is charage trappling in gate oxide while that in short channel device with 5.mu.m channel length is defect creation in active poly-Si layer. We propose that the increased defect density within depletion region near drain junction due to high electric field which could be evidenced by kink effect, constitutes the important reason for this significant degradation in short channel poly-Si TFT. The proposed model is verified by comparing the amounts of the defect creation and the charge trapping from the strechout voltage.

In this paper, the frequency separation locking and interval stabilization of 4-channel DFB-LDs have been demonstrated using a fiber Fabry-Perot filter with an free spectral range of 100GHz. Frequency fluctuation and locking range of each channel were appeared to be within 15MHz and over 12GHz, respectively. Back-reflection curve from the fiber Fabry-Perot filter was used for the extraction of an error signal in order to increase the number of accomodable channels and extinction ratio.

Derived was the scalar wave equation of optical fibers. Based on the derived equation, the dispersion characteristics of arbitrarily profiled fibers were analyzed. We applied the 1-D FEM employing quadratic interpolation fucntions to solve the scalar wave equation. To find the optimum index distribution of a fiber that has the ultra-low total dispersion, we analyzed QC fibers as objects. Adding 2$_{nd}$ and 3$_{rd}$ clads to DC fiber, we investigated the change of dispersion characteristics. We found the QC fiber parameters for which the dispersion was ultra-low flattened, less than 0.5 ps/km.nm for ${\lambda}=1.4~1.6{\mu}m$, and the dispersion value was as low as 0.20 ps/km.nm at ${\lambda}=1.55{\mu}m$.

The design procedure of a GaAs/AlGaAs semiconductor matrix optical switch is presented for a simplified tree architecture in the viewpoint of optical loss. A low loss, 0.537 dB/cm, pin type substrate is designed by considering the loss due to imputity doping at 1.3 $\mu$m wavelength. The operating voltage and the device length of a reversed ${\Delta}{\beta}$ electro-optic directional coupler(EODC) swith which is a cross-point device of the 4${\times}$4 matrix optical switch and the bending loss of rib waveguide are caculated as functions of waveguide parameters and bending parameters. There is an optimum bending radius for some waveguide parameters. It is recommened that higher optical confinement conditions such as wide waveguide width and higher rib-height should be chosen for structural parameters of a low loss and a process insensitive 4${\times}$4 matris optical switch. A 4${\times}$4 optical matrix switch which has a 3 dB loss and a 12 volt operating voltage is designed.

This paper presents a new high-level synthesizer for ASIC designs using ASIC library or FPGAs. DAMUL defines the VHDL description for a specified hardware and allocate some VHDL codes, which describe the behavioral specification, to the corresponding hardware before the synthesis. The interconnections are implemented by the multiplexers, and the objective of allocation is the minimization of the number of multiplexers. Also, the dedicated registers is used for global variables, in order to implement the other necessary registers as well as status and control registers. The effectiveness of the proposed system is shown by the synthesis results of benchmark circuits.