The Transactions of the Korean Institute of Power Electronics (전력전자학회논문지)

The Korean Institute of Power Electronics (전력전자학회)
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Design and Efficiency Analysis 48V-12V Converter using Gate Driver Integrated GaN Module

게이트 드라이버가 집적된 GaN 모듈을 이용한 48V-12V 컨버터의 설계 및 효율 분석

  • Kim, Jongwan (Future Energy Electronics Center, Virginia Polytechnic Institute and State University) ;
  • Choe, Jung-Muk (United Technologies Research Center) ;
  • Alabdrabalnabi, Yousef (Future Energy Electronics Center, Virginia Polytechnic Institute and State University) ;
  • Lai, Jih-Sheng Jason (Future Energy Electronics Center, Virginia Polytechnic Institute and State University)
  • Received : 2019.01.22
  • Accepted : 2019.03.08
  • Published : 2019.06.20
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Abstract

This study presents the design and experimental result of a GaN-based DC-DC converter with an integrated gate driver. The GaN device is attractive to power electronic applications due to its superior device performance. However, the switching loss of a GaN-based power converter is susceptible to the common source inductance, and converter efficiency is severely degraded with a large loop inductance. The objective of this study is to achieve high-efficiency power conversion and the highest power density using a multiphase integrated half-bridge GaN solution with minimized loop inductance. Before designing the converter, several GaN and Si devices were compared and loss analysis was conducted. Moreover, the impact of common source inductance from layout parasitic inductance was carefully investigated. Experimental test was conducted in buck mode operation at 48 -12 V, and results showed a peak efficiency of 97.8%.

Keywords

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Fig. 1. The circuit diagram of a synchronous buck converter with the common source inductance.

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Fig. 2. Efficiency curve of with respect to the number of phases.

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Fig. 3. Information of LMG5200.

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Fig. 4. The PCB board design of prototype synchronous buck converter using LMG 5200.

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Fig. 5. Thermal image of synchronous buck converter under 100% load after 30min operation.

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Fig. 6. Turn on waveform of low side GaN FET.

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Fig. 7. Turn off waveform of low side GaN FET.

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Fig. 8. The efficiency curve of prototype hardware.

TABLE III THE POWER LOSS CALCULATION AT 500 W

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TABLE I GAN AND SI DEVICE CHARACTERISTICS

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TABLE II THE CALCULATED COMMON SOURCE INDUCTANCE

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