The Transactions of the Korean Institute of Power Electronics (전력전자학회논문지)

The Korean Institute of Power Electronics (전력전자학회)
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Development of Hardware In-the-Loop Simulation System for Testing Power Management of DC Microgrids Based on Decentralized Control

분산제어 기반 직류 마이크로그리드 전력관리시스템의 HIL 시뮬레이션 적용 연구

  • To, Dinh-Du (Dept. of Electrical Engineering, Yeungnam University) ;
  • Le, Duc-Dung (Dept. of Electrical Engineering, Yeungnam University) ;
  • Lee, Dong-Choon (Dept. of Electrical Engineering, Yeungnam University)
  • Received : 2018.09.30
  • Accepted : 2018.12.08
  • Published : 2019.06.20
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Abstract

This study proposes a hardware-in-the-loop simulation (HILS) system based on National Instruments' PXI platform to test power management and operation strategies for DC microgrids (MGs). The HILS system is developed based on the controller HIL prototype, which involves testing the controller board in hardware with a real-time simulation model of the plant in a real-time digital simulator. The system provides an economical and effective testing function for research on MG systems. The decentralized power management strategy based on the DC bus signaling method for DC MGs has been developed and implemented on the HILS platform. HILS results are determined to be similar to those of the off-line simulation in PSIM software.

Keywords

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Fig. 1. Classification of simulation.

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Fig. 2. Basic HILS configuration. (a) CHIL, (b) PHIL.

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Fig. 3. Hardware configuration of HILS system.

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Fig. 4. DC-DC Converter Circuit. (a) Buck, (b) Half-bridge.

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Fig. 6. Operating mode definition based on DC bus voltage.

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Fig. 8. Detailed control block diagram.

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Fig. 5. Typical DC microgrid system configuration.

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Fig. 7. V-I characteristic for energy resources in DC MGs. (a) Distributed generators, (b) ESS converter, (c) Utility interface converter.

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Fig. 9. HILS platform.

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Fig. 10. Performances for the transition between Mode I and Mode II.

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Fig. 11. Performances for the transition between Mode II and Mode III.

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Fig. 12. Performances for the transition between Mode I and Mode II (HILS).

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Fig. 13. Performances for the transition between Mode II and Mode III (HILS).

TABLE I PARAMETERS OF THE SYSTEM

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