DOI QR코드

DOI QR Code

Improved Memory Characteristics by NH3 Post Annealing for ZrO2 Based Charge Trapping Nonvolatile Memory

  • Tang, Zhenjie (College of Physics and Electronic Engineering, Anyang Normal University) ;
  • Zhao, Dongqiu (College of Physics and Electronic Engineering, Anyang Normal University) ;
  • Li, Rong (School of Mathematics and Statistics, Anyang Normal University) ;
  • Zhu, Xinhua (National Laboratory of Solid State Microstructures, Nanjing University)
  • 투고 : 2012.12.04
  • 심사 : 2013.12.28
  • 발행 : 2014.02.25

초록

Charge trapping nonvolatile memory capacitors with $ZrO_2$ as charge trapping layer were fabricated, and the effects of post annealing atmosphere ($NH_3$ and $N_2$) on their memory storage characteristics were investigated. It was found that the memory windows were improved, after annealing treatment. The memory capacitor after $NH_3$ annealing treatment exhibited the best electrical characteristics, with a 6.8 V memory window, a lower charge loss ~22.3% up to ten years, even at $150^{\circ}C$, and excellent endurance (1.5% memory window degradation). The results are attributed to deep level bulk charge traps, induced by using $NH_3$ annealing.

키워드

참고문헌

  1. S. H. Lee, Y. Jung, R. Agarwal, Nat. Nanotechnol. 2, 626 (2007) [DOI: http://dx.doi.org/10.1038/nnano.2007.291].
  2. J. K. Bu and M. H. White, Solid State electron. 45, 113 (2001) [DOI: http://dx.doi.org/10.1016/S0038-1101(00)00232-X].
  3. G. Zhang, X. P. Wang, W. J. Yoo, M. F. Li, IEEE Trans Electron Devices. 54, 3317 (2007) [DOI: http://dx.doi.org/10.1109/TED.2007.908888 ].
  4. Z. J. Tang, H. N. Xu, H. T. Li, C. Yan, Y. D. Xia, J. Yin, X. H. Zhu, Z. G. Liu, A. D. Li, and F. Yan, Microelectron. Eng. 88, 3227 (2011) [DOI: http://dx.doi.org/10.1016/j.mee.2011.06.025].
  5. J. H. Kim, J.B. Choi, IEEE Trans. Electron Devices. 51, 2048 (2004) [DOI: http://dx.doi.org/10.1109/TED.2004.838446 ].
  6. Z. J. Tang, Y. D. Xia, H. N. Xu, J. Yin, Z. G. Liu, A. D. Li, X. J. Liu, Y. Feng and X. L. Ji, Electrochem Solid State Lett. 14, G13 (2011) [DOI: http://dx.doi.org/10.1149/1.3518706].
  7. X. Zhu, Y. Yang, Q. Li, D. E. Ioannou, J. S. Suehle, C. A. Richter, Microelectron. Eng. 85, 2403 (2008) [10.1016/j.mee.2008.09.013]
  8. Z. J.Tang, X. H. Zhu, H. N. Xu, Y. D. Xia, J. Yin, Z. G. Liu, A. D. Li and F. Yan, Materials Letters, 92, 21 (2013) [DOI: http://dx.doi.org/10.1016/j.matlet.2012.10.024].
  9. Y. Zhou, J. Yin, H. N. Xu, Y. D. Xia, Z. G. Liu, A. D. Li, Y. P. Gong, L. Pu, F. Yan and Y. Shi, Appl. Phys. Lett. 97, 143504 (2010) [DOI: http://dx.doi.org/10.1063/1.3496437].
  10. Y. N. Tan, W. K. Chim. W. K. Choi, M. S. Joo and B. J. Cho, IEEE Trans. Electron Devices. 53, 654 (2006 ) [DOI: http://dx.doi.org/10.1109/TED.2006.870273].
  11. M. S. Joo, B. J. Cho, C. C. Yeo, D. S. H. Chan, S. J. Whoang, S. Matthew, L. K. Bera, N. Bala and D. L. Kwong, IEEE Trans. Electron Devices, 50, 2088 (2003) [DOI: http://dx.doi.org/10.1109/TED.2003.816920].
  12. L. Liu, J. P. Xu, F. Ji, J. X. Chen, and P. T. Lai, Appl. Phys. Lett. 101, 033501 (2012) [DOI: http://dx.doi.org/10.1063/1.4737158].
  13. A Roy. and M. H. White, Solid-State Electronics. 34, 1083 (1991) [DOI: http://dx.doi.org/10.1016/0038-1101(91)90104-7].
  14. Y. Hu and M. H. White, Solid State Electronics. 36, 1401 (1993) [DOI: http://dx.doi.org/10.1016/0038-1101(91)90036-X].
  15. S. J. Wrazien, Y. Zhao, J. D. Krayer and White M. H, Solid State Electronics. 47, 885 (2003) [DOI: http://dx.doi.org/10.1016/S0038-1101(02)00448-3].
  16. Y. Yang, M. H. White, Solid State Electronics. 44, 949 (2000) [10.1016/S0038-1101(00)00012-5].
  17. L. G. Gao, K. B. Yin, Y. D. Xia, L. Chen, H. X. Guo, L. Shi, J. Yin and Z. G. Liu, J Phys D Appl Phys. 42, 015306 (2009) [DOI: http://dx.doi.org/10.1088/0022-3727/42/1/015306].
  18. C. S. Lai, K. M. Fan, H. K. Peng, S. J. Lin, C. Y. Lee and C. F. Ai, Appl. Phys. Lett. 90, 172904 (2007) [DOI: http://dx.doi.org/10.1063/1.2975183].
  19. S. Yamada, Y. Hiura, T. Yamane, K. Amemiya, Y. Oshima, and K. Yoshikawa, IEDM Tech. Dig., 23 (1993) [DOI: http://dx.doi.org/10.1109/IEDM.1993.347407].

피인용 문헌

  1. Improvement of data retention characteristics of OSOSO multi-stacked MIS capacitor for flat panel display technology vol.37, 2015, https://doi.org/10.1016/j.mssp.2014.12.037
  2. Process Optimization and Device Characterization of Nonvolatile Charge Trap Memory Transistors Using In–Ga–ZnO Thin Films as Both Charge Trap and Active Channel Layers vol.63, pp.8, 2016, https://doi.org/10.1109/TED.2016.2580220
  3. Effect of Annealing Atmosphere on the La2O3Nanocrystallite Based Charge Trap Memory vol.15, pp.2, 2014, https://doi.org/10.4313/TEEM.2014.15.2.73
  4. Effects of Composition on the Memory Characteristics of (HfO2)x(Al2O3)1-xBased Charge Trap Nonvolatile Memory vol.15, pp.5, 2014, https://doi.org/10.4313/TEEM.2014.15.5.241
  5. Dependence of Electrons Loss Behavior on the Nitride Thickness and Temperature for Charge Trap Flash Memory Applications vol.15, pp.5, 2014, https://doi.org/10.4313/TEEM.2014.15.5.245
  6. Areal Geometric Effects of a ZnO Charge-Trap Layer on Memory Transistor Operations for Embedded-Memory Circuit Applications vol.38, pp.9, 2017, https://doi.org/10.1109/LED.2017.2729578
  7. Flash Memory Featuring Low-Voltage Operation by Crystalline ZrTiO4 Charge-Trapping Layer vol.7, 2017, https://doi.org/10.1038/srep43659