• Proceedings of the Korean Society of Crop Science Conference
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• 1994.10a
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• pp.74-75
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• 1994

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.7
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• pp.1497-1501
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• 2005

Branch instructions which make the sequential instruction flow changed cause pipeline stalls in microprocessor. The pipeline hazard due to branch instructions are the most serious problem that degrades the performance of microprocessors. Branch target buffer predicts whether a branch will be taken or not and supplies the address of the next instruction on the basis of that prediction. If the hanch target buffer predicts correctly, the instruction flow will not be stalled. This leads to the better performance of microprocessor. In this paper, the architecture of a ta8 memory that branch target buffer and TLB can share is presented. Because the two tag memories used for branch target buffer and TLB each is replaced by single combined tag memory, we can expect the smaller chip size and the faster prediction. This shared tag architecture is more advantageous for the microprocessors that uses more bits of address and exploits much more instruction level parallelism.

• Proceedings of the Korean Society of Crop Science Conference
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• 1993.10a
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• pp.28-29
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• 1993

• 대한예방의학회:학술대회논문집
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• 2001.10a
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• pp.222-223
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• 2001

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.767-770
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• 1998

This paper introduces an instruction fetch unit which is designed for RAPTOR, an on-chip multiprocessor. In order to reduce control hazards, the proposed fetch unit supports a hybrid branch prediction scheme which consists of a static scheme and the 2bC branch prediction scheme. The fetch unit also utilizes the branch folding technique with two instruction buffers to avoid the branch penalty caused by imspredictions. Instructions are predecoded in the fetch unit to achieve extra performance gain.

• Proceedings of the Korean Vacuum Society Conference
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• 2002.06a
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• pp.183-184
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• 2002

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.350-353
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• 2003

In this paper, we designed and implemented a 10dB directional coupler with high directivity using branch line structure. The characteristic impedance of parallel branch line for 10 dB directional coupler is about 150 $\Omega$. To realize high characteristic impedance in microstrip line, we used the coupled line structure. The directional coupler were implemental and measured. The measured results show that the directivity is high than 24 dB.

• Honam Mathematical Journal
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• v.42 no.3
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• pp.501-510
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• 2020

This paper considers coupled fixed point theorems on unital without of order semi-simple fundamental locally multiplicative topological algebras (abbreviated by FLM algebras).

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.547-548
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• 2006

In this paper, cost effective parallel-branch inductor has been proposed and developed in order to increase the quality factor of the conventional spiral inductor. This parallel-branch inductor is composed of only two metals. The presented parallel-branch inductor shows 12% improvement in the quality factor with the same area as the conventional inductor. Also, we improve the parallel-branch inductor for high frequency applications.

• Journal of Industrial Technology
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• v.9
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• pp.101-107
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• 1989

The magnetic forming system must be able to store very important electric energy, several tens kilojoules, and flow this energy through the forming coil within some hundreds microseconds. So several hundreds kiloamperes of current can flow through the branch conductor. For the good performance of this type of machine, internal impedance must be minimized. By the computation of distribution of current inside the conductors using integral equation method, we can obtain the inductance and resistance of some dispositions of branch conductors and by comparison obtain some principles for the design of branch conductors in the high power magnetic pulse generator.