• Title/Summary/Keyword: wireless hardware

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Analyses of Hardware Architecture for High-speed authentication protocol in wireless communication (무선망에서의 고속 인증 프로토콜 구현을 위한 구조 분석)

  • Jung, Sung-Hyuk;Kim, Jung-Tae
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.803-806
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    • 2005
  • In this paper, we analyses of Architecture for High-speed authentication protocol in wireless communication. The rapid process in wireless communication systems, personal communications, and smartcard technologies has brought new opportunities and challenges to be met by engineers and researchers working on the security aspects of the new communication. In real world, we have restricted hardware environments with limited computational power and small memory, we meet more challenges. Then we analyes the need of consideration to implement the system.

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A Fully Synthesizable Bluetooth Baseband Module for a System-on-a-Chip

  • Chun, Ik-Jae;Kim, Bo-Gwan;Park, In-Cheol
    • ETRI Journal
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    • v.25 no.5
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    • pp.328-336
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    • 2003
  • Bluetooth is a specification for short-range wireless communication using the 2.4 GHz ISM band. It emphasizes low complexity, low power, and low cost. This paper describes an area-efficient digital baseband module for wireless technology. For area-efficiency, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware-efficient functions, such as low-level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB)interfaces; and audio Codec are performed by dedicated hardware blocks. Furthermore, we eliminate FIFOs for data buffering between hardware functional units. The design is done using fully synthesizable Verilog HDL to enhance the portability between process technologies so that our module can be easily integrated as an intellectual property core no system-on-a-chip (SoC) ASICs. A field programmable gate array (FPGA) prototype of this module was tested for functional verification and realtime operation of file and bitstream transfers between PCs. The module was fabricated in a $0.25-{\mu}m$ CMOS technology, the core size of which was only 2.79 $mm{\times}2.80mm$.

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FPGA application for wireless monitoring in power plant

  • Kumar, Adesh;Bansal, Kamal;Kumar, Deepak;Devrari, Aakanksha;Kumar, Roushan;Mani, Prashant
    • Nuclear Engineering and Technology
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    • v.53 no.4
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    • pp.1167-1175
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    • 2021
  • The process of automation and monitoring in industrial control system involves the use of many types of sensors. A programmable logic controller plays an important role in the automation of the different processes in the power plant system. The major control units are boiler for temperature and pressure, turbine for speed of motor, generator for voltage, conveyer belt for fuel. The power plant units are controlled using microcontrollers and PLCs, but FPGA can be the feasible solution. The paper focused on the design and simulation of hardware chip to monitor boiler, turbine, generator and conveyer belt. The hardware chip of the plant is designed in Xilinx Vivado Simulator 17.4 software using VHDL programming. The methodology includes VHDL code design, simulation, verification and testing on Virtex-5 FPGA hardware. The system has four independent buzzers used to indicate the status of the boiler, generator, turbine motor and conveyer belt in on/off conditions respectively. The GSM is used to display corresponding message on the mobile to know the status of the device in on/off condition. The system is very much helpful for the industries working on plant automation with FPGA hardware integration.

The Efficient AES-CCM Architecture for a hardware library in the WAVE (WAVE 하드웨어 암호 라이브러리에 적합한 효율적인 AES-CCM 구조 설계)

  • Lee, Yeon-Cheol;Seo, Hwa-Jeong;Kim, Ho-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.12
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    • pp.2899-2905
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    • 2013
  • According to developing wireless communications in vehicle, various security threat in the WAVE(Wireless access in vehicular environments) is increased. To protect this, IEEE 1609.2 specify services as for prevent message from attacks such as spoofing, eavesdropping and replay. It is possible to implement a hardware library for defending these attacks. In this paper, we proposed a efficient AES-CCM architecture for the hardware library in the WAVE. We compare our architecture to the previous one in the same FPGA. And our design uses less slices than 27 % of it and less slices than 45 % of it if we share registers that were used by other modules in the library. We also achieves a throughput of 1355 Gbits/s in xc5vlx110t-2ff1136.

Implementation of fast stream cipher AA128 suitable for real time processing applications (실시간 처리 응용에 적합한 고속 스트림 암호 AA128 구현)

  • Kim, Gil-Ho;Cho, Gyeong-Yeon;Rhee, Kyung Hyune;Shin, Sang Uk
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.10
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    • pp.2207-2216
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    • 2012
  • Recently, wireless Internet environment with mobile phones and wireless sensor networks with severe resource restrictions have been actively studied. Moreover, an overall security issues are essential to build a reliable and secure sensor network. One of secure solution is to develop a fast cryptographic algorithm for data encryption. Therefore, we propose a 128-bit stream cipher, AA128 which has efficient implementation of software and hardware and is suitable for real-time applications such as wireless Internet environment with mobile phones, wireless sensor networks and Digital Right Management (DRM). AA128 is stream cipher which consists of 278-bit ASR and non-linear transformation. Non-linear transformation consists of Confusion Function, Nonlinear transformation(SF0 ~ SF3) and Whitening. We show that the proposed stream cipher AA128 is faster than AES and Salsa20, and it satisfies the appropriate security requirements. Our hardware simulation result indicates that the proposed cipher algorithm can satisfy the speed requirements of real-time processing applications.

Design and Implementation of a Wireless CCTV System based on the Binary-CDMA Technology (Binary CDMA 기반의 무선 CCTV 시스템 설계 및 구현)

  • Choi, Jae-Won
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.1
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    • pp.72-80
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    • 2012
  • Binary CDMA is a new standard technology for wireless communication developed by our country that makes high speed communications and good quality of services. In this paper we researched the design and implementation methods of a wireless CCTV System based on the Binary-CDMA technology that makes it freely installed in any place without cables and laying works. We implemented the hardware and software for the CCTV system and developed a Prototype Wireless CCTV system based on the Binary-CDMA technology.

A Development of CCTV Control System Based on Wireless Sensor Network (무선 센서 네트워크 기반 CCTV 제어 시스템 연구)

  • Cho, Soo-Hyung;Kim, Dae-Hwan
    • 한국정보통신설비학회:학술대회논문집
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    • 2009.08a
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    • pp.219-220
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    • 2009
  • Many surveillance cameras used in security system are controlled with RS-485 communication protocol. In this situation, if RS-485 connection can be replaced with wireless connection using sensor network technology, an installation will become ease because of no wired connection and also a deployment of cameras will become free. This paper explains about the design of wireless sensor node and the necessary implementation for an operation, which can be replacing RS-485 connection for the development of CCTV control system based on wireless sensor network. The hardware platform of sensor node was designed based on MicaZ and the software was developed based on TinyOS. To control surveillance cameras deployed on wide area, the supporting of multi-hop also was implemented. With the result of experiment deploying on real environment, it was revealed that the controller could control cameras quickly with wireless.

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Design and Implementation of Autonomic Multimedia Transcoding System for Network Adaptive QoS (네트워크 적응적 QoS를 위한 오토노믹 멀티미디어 트랜스코딩 시스템의 설계 및 구현)

  • Seo, Donh-Mahn;Jung, In-Bum
    • Journal of Industrial Technology
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    • v.27 no.A
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    • pp.131-139
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    • 2007
  • The recent advance in wireless network technologies has enabled the streaming media service on the mobile devices such as PDAs and cellular phones. Since the wireless network has low bandwidth channels and mobile devices are actually composed of limited hardware specifications, the transcoding technology is needed to adapt streaming media to given mobile devices. Futhermore owing to the diversity of bandwidth in the wireless network by reason of mobile users' movements and environments, it is difficult to provide stable QoS. In this paper, the autonomic multimedia transcoding system is proposed in order for users to provide network adaptive QoS. Our proposed system is based on the estimation of available bandwidth in wireless network for seamless multimedia streaming service. The proposed system is designed and implemented for various mobile clients. In experiments, we evaluate its seamless multimedia streaming and the adaptation transcoding bit rate according to the changes of bandwidth in wireless network.

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Development of a Hardware-in-the-loop Simulator for Spacecraft Attitude Control Using Thrusters

  • Koh, Dong-Wook;Park, Sang-Young;Kim, Do-Hee;Choi, Kyu-Hong
    • Journal of Astronomy and Space Sciences
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    • v.26 no.1
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    • pp.47-58
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    • 2009
  • In this study, a Hardware-In-the-Loop (HIL) simulator using thrusters is developed to validate the spacecraft attitude system. To control the attitude of the simulator, eight cold gas thrusters are aligned with roll, pitch and yaw axis. Also linear actuators are applied to the HIL simulator for automatic mass balancing to compensate the center of mass offset from the center of rotation. The HIL simulator consists of an embedded computer (Onboard PC) for simulator system control, a wireless adapter for wireless network, a rate gyro sensor to measure 3-axis attitude of the simulator, an inclinometer to measure horizontal attitude, and a battery set to supply power for the simulator independently. For the performance test of the HIL simulator, a bang-bang controller and Pulse-Width Pulse-Frequency (PWPF) modulator are evaluated successfully. The maneuver of 68 deg. in yaw axis is tested for the comparison of the both controllers. The settling time of the bang -bang controller is faster than that of the PWPF modulator by six seconds in the experiment. The required fuel of the PWPF modulator is used as much as 51% of bang-bang controller in the experiment. Overall, the HIL simulator is appropriately developed to validate the control algorithms using thrusters.