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Bottom Gate Voltage Dependent Threshold Voltage Roll-off of Asymmetric Double Gate MOSFET (하단게이트 전압에 따른 비대칭 이중게이트 MOSFET의 문턱전압이동 의존성)

  • Jung, Hakkee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.6
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    • pp.1422-1428
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    • 2014
  • This paper has analyzed threshold voltage roll-off for bottom gate voltages of asymmetric double gate(DG) MOSFET. Since the asymmetric DGMOSFET is four terminal device to be able to separately bias for top and bottom gates, the bottom gate voltage influences on threshold voltage. It is, therefore, investigated how the threshold voltage roll-off known as short channel effects is reduced with bottom gate voltage. In the pursuit of this purpose, off-current model is presented in the subthreshold region, and the threshold voltage roll-off is observed for channel length and thickness with a parameter of bottom gate voltage as threshold voltage is defined by top gate voltage that off-currnt is $10^{-7}A/{\mu}m$ per channel width. As a result to observe the threshold voltage roll-off for bottom gate voltage using this model, we know the bottom gate voltage greatly influences on threshold voltage roll-off voltages, especially in the region of short channel length and thickness.

Patterning of Y-Ba-Cu-O thin films by rdactive ion etching(RIE) (활성이온식각법에 의한 Y-Ba-Cu-O고온초전도 박막의 미세선 제작)

  • Park, Jong-Hyeok;Han, Taek-Sang;Kim, Yeong-Hwan;Choe, Sang-Sam
    • Korean Journal of Materials Research
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    • v.3 no.2
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    • pp.151-157
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    • 1993
  • Abstract We have fabricated Y-Ba-Cu-O superconducting thin films by in-situ on-axis rf magnetron sputtering method using $Y_1$B$a_2$C${u_4}\;{_2O_x}$ nonstoichiometric target. Reactive ion etching (RIE) method was used in patterning the films. We have investigated the properties of patterned films, and compared the properties of the films before and after patterning. As the line width of the pattern decreases from 5${\mu}$m to 2${\mu}$m, a slight but not significant degradation in superconducting properties of the patterned films is observed. The bridge patterns are found to have clean edges and good electrical properties enough to be applied in device applications. From the result of this research, the possibility of submicron patterning by RlE is confirmed.

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A 20 GHz Band 1 Watt MMIC Power Amplifier (20 GHz대 1 Watt 고출력증폭 MMIC의 설계 및 제작)

  • 임종식;김종욱;강성춘;남상욱
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.10 no.7
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    • pp.1044-1052
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    • 1999
  • A 2-stage 1 watt MMIC(Monolithic Microwave Integrated Circuits) HPA(High Power Amplifiers) at 20 GHz band has been designed and fabricated. The $0.15\mu\textrm{m}$ with the width of $400\mu\textrm{m}$for single device pHEMT technology was used for the fabrication of this MMIC HPA. Due to the series feedback technique from source to ground, bias circuits and stabilization circuits on the main microstrip line, the stability factors(Ks) are more than one at full frequency. The independent operation for each stage and excellent S11, S22 less than -20 dB have been obtained by using lange couplers. For beginning the easy design, linear S-parameters have been extracted from the nonlinear equivalent circuit in foundry library, and equivalent circuits of devices at in/output ports were calculated from this S-parameters. The measured performances, which are in well agreement with the predicted ones, showed the MMIC HPA in this paper has the minimum 15 dB of linear gain, -20 dB of reflection coefficients and 31 dBm of output power over 17~25 GHz.

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Intelligent silicon bead chip design for bio-application (바이오 응용을 위한 지능형 실리콘 비드 칩 설계)

  • Moon, Hyung-Geun;Chung, In-Young
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.16 no.5
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    • pp.999-1008
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    • 2012
  • Unlike the existing CMOS chip, ISB (Intelligent Silicon Bead) is new concept biochip equipped with optical communication and memory function. It uses the light for power of SoC CMOS and interface with external devices therefore it is possible to miniaturize a chip size and lower the cost. This paper introduces an input protocol and a design of the low power and the low area to transfer the power and the signal through a single optical signal applied from external reader device to bead chip at the same time. It is also verified through simulation and measurement. In addition, low-power PROM is designed for recording and storing ID of a chip and it is successful in obtaining the value of output according to the optical input. Through this study, a new type biochip development can be expected by solving high cost and a limit of miniaturizing a chip area problem of an existing RFID.

A Transflective Liquid Crystal Display Driven by the Fringe Field Using a Liquid Crystal with a Negative Dielectric Anisotropy

  • Kim, Jin-Ho;Her, Jung-Hwa;Lim, Young-Jin;Kumar, Pankaj;Lee, Seung-Hee;Park, Kyoung-Ho;Lee, Joun-Ho;Kim, Byeong-Koo
    • Transactions on Electrical and Electronic Materials
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    • v.11 no.3
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    • pp.134-137
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    • 2010
  • We have proposed a transflective liquid crystal display (LCD) driven by the fringe field using a liquid crystal (LC) with a negative dielectric anisotropy. The device used different twist angles of the liquid crystals (LC) in the transmissive (T) and the reflective (R) regions when voltage is applied. With the optimization of the pixel electrode width and the distance between them, the LC directors in the R- and T-regions can be rotated by about $22.5^{\circ}$ and $45^{\circ}$ on an average, respectively. As a result, a high image quality transflective LCD with a single gap, a single gamma, and a wide viewing angle characteristics in both the R- and T- regions can be realized.

High Performance $2{\times}4$ S-SEED Array with Extremely Shallow Quantum Well and Asymmetric Fabry-Peort Cavity Structure (저장벽 양자우물고조와 비대칠 패브리-페로 공명기 구조에 의한 고성능 $2{\times}4$ S-SEED Array 구현)

  • 권오균;최영완;김광준;이일항;이상훈;원용협;유형모
    • Korean Journal of Optics and Photonics
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    • v.5 no.1
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    • pp.144-151
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    • 1994
  • We designed and fabricated a $2{\times}4$ symmetric self electro-optic effect device array using GaAs/ AIo.04 G$\DeltaR$), and optical bistability loop width ($\Delta$). The average values of the elements of the $2{\times}4$ S-SEED array were CR~13.1, R~24%, and $\Delta$~91%. It was found that the AFP cavity structure enhances the self-biased optical bistability in ESQW-SEED under no external bias. That is due to the decreased intrisic region thickness in AFP-SEED structures, and which increases the built-in electric fields. The zero-biased S-SEED showed CR of ~4.7, R~9%, and $\Delta$~22%.X>~22%.

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A Study on Development of a PIN Semiconductor Detector for Measuring Individual Dose (개인 선량 측정용 PIN 반도체 검출기 개발에 관한 연구)

  • Lee, B.J.;Lee, W.N.;Khang, B.O.;Chang, S.Y.;Rho, S.R.;Chae, H.S.
    • Journal of Radiation Protection and Research
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    • v.28 no.2
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    • pp.87-95
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    • 2003
  • The fabrication process and the structure of PIN semiconductor detectors have been designed optimally by simulation for doping concentration and width of p+ layer, impurities re-contribution due to annealing and the current distribution due to guard ring at the sliced edges. The characteristics to radiation response has been also simulated in terms of Monte Carlo Method. The device has been fabricated on n type, $400\;{\Omega}cm$, orientation <100>, Floating-Zone silicon wafer using the simulation results. The leakage current density of $0.7nA/cm^2/100{\mu}m$ is achieved by this process. The good linearity of radiation response to Cs-137 was kept within the exposure ranges between 5 mR/h and 25 R/h. This proposed process could be applied for fabricating a PIN semiconductor detector for measuring individual dose.

Threshold Voltage Roll-off for Bottom Gate Voltage of Asymmetric Double Gate MOSFET (비대칭 이중게이트 MOSFET의 하단게이트 전압에 따른 문턱전압이동현상)

  • Jung, Hakkee
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.05a
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    • pp.741-744
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    • 2014
  • This paper has analyzed threshold voltage roll-off for bottom gate voltages of asymmetric double gate(DG) MOSFET. Since the asymmetric DGMOSFET is four terminal device to be able to separately bias for top and bottom gates, the bottom gate voltage influences on threshold voltage. It is, therefore, investigated how the threshold voltage roll-off known as short channel effects is reduced with bottom gate voltage. In the pursuit of this purpose, off-current model is presented in the subthreshold region, and the threshold voltage roll-off is observed for channel length and thickness with a parameter of bottom gate voltage as threshold voltage is defined by top gate voltage that off-currnt is $10^{-7}A/{\mu}m$ per channel width. As a result to observe the threshold voltage roll-off for bottom gate voltage using this model, we know the bottom gate voltage greatly influences on threshold voltage roll-off voltages, especially in the region of short channel length and thickness.

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Design and embodiment of bloodstream diagnosis device that introduce EPLD and TMS320VC5410 for cerebrum disease measurement in supersonic waves base (초음파 기반에서 대뇌질환 측정을 위한 EPLD와 TMS320VC5410를 도입한 혈류 진단장치의 설계 및 구현)

  • Kim, Whi-Young
    • Journal of the Korea Computer Industry Society
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    • v.7 no.4
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    • pp.447-454
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    • 2006
  • Imbecility, Parkinson's disease, the brain disease occurrence rate such as motor nerve disease are increasing rapidly since 1980 years, according to the Britain, the United States of America, Japan, Germany, result that investigate the spanish occurrence rate, was expose that imbecility mortality including Alzheimer's disease increased more than man case 3 triple and man and woman of brain disease mortality increases by about 50% with Parkinson's disease and motor nerve disease. <중략> first of all, courtesy call is important. So that can find out danger benevolence and occurrence danger at early stage, person arranged brain vein because examination does special Quality examination and modelling Tuesday embodying possible Cerebrovascular Ultrasonogram (brain vein supersonic waves) and prove excellency of performance from time to time. Is going to apply to brain disease patient of other disease if supplement system hereafter, and this research tried to study special quality that standardization is not producing poetic theme width directly and approach.

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Design and Fabrication of C-Band GaN Based on Solid State High Power Amplifier Unit for a Radar System (레이다용 C-대역 GaN 기반 고출력전력증폭장치 설계 및 제작)

  • Jung, Hyoung Jin;Park, Ji Woong;Jin, Hyoung Seok;Lim, Jae Hwan;Park, Se Jun;Kang, Min Woo;Kang, Hyun Chul
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.9
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    • pp.685-697
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    • 2017
  • In this paper, it is presented the result of design and fabrication for C-band solid state high power amplifier unit and components using in search radar. The solid state power amplifier(SSPA) assembly was fabricated using GaN(Gallium Nitride), which is semiconductor device, and the transmit signal output power of the solid state high power amplifier unit is generated by combining the transmit signal power of the solid state power amplifier configured in parallel through a design and fabricated waveguide type transmit signal combine assembler. Designed solid state high power amplifier unit demonstrated C-band 500 MHz bandwidth, maximum 10.5% duty cycle, transmit pulse width from $0.0{\mu}s{\sim}000{\mu}s$, and transmit signal power is 44.98 kW(76.53 dBm).