• Title/Summary/Keyword: wafers

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TiO2 Thin Film Growth Research to Improve Photoelectrochemical Water Splitting Efficiency (TiO2 박막 성장에 의한 광전기화학 물분해 효율 변화)

  • Seong Gyu Kim;Yu Jin Jo;Sunhwa Jin;Dong Hyeok Seo;Woo-Byoung Kim
    • Korean Journal of Materials Research
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    • v.34 no.4
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    • pp.202-207
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    • 2024
  • In this study, we undertook detailed experiments to increase hydrogen production efficiency by optimizing the thickness of titanium dioxide (TiO2) thin films. TiO2 films were deposited on p-type silicon (Si) wafers using atomic layer deposition (ALD) technology. The main goal was to identify the optimal thickness of TiO2 film that would maximize hydrogen production efficiency while maintaining stable operating conditions. The photoelectrochemical (PEC) properties of the TiO2 films of different thicknesses were evaluated using open circuit potential (OCP) and linear sweep voltammetry (LSV) analysis. These techniques play a pivotal role in evaluating the electrochemical behavior and photoactivity of semiconductor materials in PEC systems. Our results showed photovoltage tended to improve with increasing thickness of TiO2 deposition. However, this improvement was observed to plateau and eventually decline when the thickness exceeded 1.5 nm, showing a correlation between charge transfer efficiency and tunneling. On the other hand, LSV analysis showed bare Si had the greatest efficiency, and that the deposition of TiO2 caused a positive change in the formation of photovoltage, but was not optimal. We show that oxide tunneling-capable TiO2 film thicknesses of 1~2 nm have the potential to improve the efficiency of PEC hydrogen production systems. This study not only reveals the complex relationship between film thickness and PEC performance, but also enabled greater efficiency and set a benchmark for future research aimed at developing sustainable hydrogen production technologies.

Solution-Processed Indium-Gallium Oxide Thin-Film Transistors for Power Electronic Applications (전력반도체 응용을 위한 용액 공정 인듐-갈륨 산화물 반도체 박막 트랜지스터의 성능과 안정성 향상 연구)

  • Se-Hyun Kim;Jeong Min Lee;Daniel Kofi Azati;Min-Kyu Kim;Yujin Jung;Kang-Jun Baeg
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.4
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    • pp.400-406
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    • 2024
  • Next-generation wide-bandgap semiconductors such as SiC, GaN, and Ga2O3 are being considered as potential replacements for current silicon-based power devices due to their high mobility, larger size, and production of high-quality wafers at a moderate cost. In this study, we investigate the gradual modulation of chemical composition in multi-stacked metal oxide semiconductor thin films to enhance the performance and bias stability of thin-film transistors (TFTs). It demonstrates that adjusting the Ga ratio in the indium gallium oxide (IGO) semiconductor allows for precise control over the threshold voltage and enhances device stability. Moreover, employing multiple deposition techniques addresses the inherent limitations of solution-processed amorphous oxide semiconductor TFTs by mitigating porosity induced by solvent evaporation. It is anticipated that solution-processed indium gallium oxide (IGO) semiconductors, with a Ga ratio exceeding 50%, can be utilized in the production of oxide semiconductors with wide band gaps. These materials hold promise for power electronic applications necessitating high voltage and current capabilities.

A study on the growth behavior of AlN single crystal growth by hydride vapor phase epitaxy (Hydride vapor phase epitaxy에 의한 후막 AlN 단결정의 성장 거동에 관한 연구)

  • Seung-min Kang
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.34 no.4
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    • pp.139-142
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    • 2024
  • Along with the use of wide bandgap energy materials such as SiC and GaN in power semiconductors and the development trend of devices, many research results have been reported, including the success of research on AlN single crystals with higher energy gaps and the development of 2-inch single crystal wafers. However, AlN single crystals grown using chemical vapor deposition have been developed into thin films less than a few micrometers thick, but there are almost no results with thicknesses greater than that. Therefore, in this study, we attempted to grow by applying HVPE (Hydride vapor phase epitaxy), one of the chemical vapor deposition methods. The grown AlN single crystal was manufactured using self-designed equipment, and we attempted to establish the conditions for manufacturing AlN single crystals on sapphire wafer. We would like to characterize the growth behavior through an optical microscope observation.

The role of porous graphite plate for high quality SiC crystal growth by PVT method (고품질 4H-SiC 단결정 성장을 위한 다공성 흑연 판의 역할)

  • Lee, Hee-Jun;Lee, Hee-Tae;Shin, Hee-Won;Park, Mi-Seon;Jang, Yeon-Suk;Lee, Won-Jae;Yeo, Im-Gyu;Eun, Tai-Hee;Kim, Jang-Yul;Chun, Myoung-Chul;Lee, Si-Hyun;Kim, Jung-Gon
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.25 no.2
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    • pp.51-55
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    • 2015
  • The present research is focused on the effect of porous graphite what is influenced on the 4H-SiC crystal growth by PVT method. We expect that it produces more C-rich and a change of temperature gradient for polytype stability of 4H-SiC crystal as adding the porous graphite in the growth cell. The SiC seeds and high purity SiC source materials were placed on opposite side in a sealed graphite crucible which was surrounded by graphite insulator. The growth temperature was around $2100{\sim}2300^{\circ}C$ and the growth pressure was 10~30 Torr of an argon pressure with 5~15 % nitrogen. 2 inch $4^{\circ}$ off-axis 4H-SiC with C-face (000-1) was used as a seed material. The porous graphite plate was inserted on SiC powder source to produce a more C-rich for polytype stability of 4H-SiC crystal and uniform radial temperature gradient. While in case of the conventional crucible, various polytypes such as 6H-, 15R-SiC were observed on SiC wafers, only 4H-SiC polytype was observed on SiC wafers prepared in porous graphite inserted crucible. The defect level such as MP and EP density of SiC crystal grown in the conventional crucible was observed to be higher than that of porous graphite inserted crucible. The better crystal quality of SiC grown using porous graphite plate was also confirmed by rocking curve measurement and Raman spectra analysis.

A Study on Wafer-Level 3D Integration Including Wafer Bonding using Low-k Polymeric Adhesive (저유전체 고분자 접착 물질을 이용한 웨이퍼 본딩을 포함하는 웨이퍼 레벨 3차원 집적회로 구현에 관한 연구)

  • Kwon, Yongchai;Seok, Jongwon;Lu, Jian-Qiang;Cale, Timothy;Gutmann, Ronald
    • Korean Chemical Engineering Research
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    • v.45 no.5
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    • pp.466-472
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    • 2007
  • A technology platform for wafer-level three-dimensional integration circuits (3D-ICs) is presented, and that uses wafer bonding with low-k polymeric adhesives and Cu damascene inter-wafer interconnects. In this work, one of such technical platforms is explained and characterized using a test vehicle of inter-wafer 3D via-chain structures. Electrical and mechanical characterizations of the structure are performed using continuously connected 3D via-chains. Evaluation results of the wafer bonding, which is a necessary process for stacking the wafers and uses low-k dielectrics as polymeric adhesive, are also presented through the wafer bonding between a glass wafer and a silicon wafer. After wafer bonding, three evaluations are conducted; (1) the fraction of bonded area is measured through the optical inspection, (2) the qualitative bond strength test to inspect the separation of the bonded wafers is taken by a razor blade, and (3) the quantitative bond strength is measured by a four point bending. To date, benzocyclobutene (BCB), $Flare^{TM}$, methylsilsesquioxane (MSSQ) and parylene-N were considered as bonding adhesives. Of the candidates, BCB and $Flare^{TM}$ were determined as adhesives after screening tests. By comparing BCB and $Flare^{TM}$, it was deduced that BCB is better as a baseline adhesive. It was because although wafer pairs bonded using $Flare^{TM}$ has a higher bond strength than those using BCB, wafer pairs bonded using BCB is still higher than that at the interface between Cu and porous low-k interlevel dielectrics (ILD), indicating almost 100% of bonded area routinely.

Baseline-Free Crack Detection in Steel Structures using Lamb Waves and PZT Polarity (램파와 압전소자 극성을 사용한 강구조의 실시간 균열손상 감지기법 개발)

  • Sohn, Hoon;Kim, Seung-Bum
    • Journal of the Earthquake Engineering Society of Korea
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    • v.10 no.6 s.52
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    • pp.79-91
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    • 2006
  • A new methodology of guided wave based nondestructive testing (NDT) is developed to detect crack damage in civil infrastructures such as steel bridges without using prior baseline data. In conventional guided wave based techniques, damage is often identified by comparing the "current" data obtained from a potentially damaged condition of a structure with the "past" baseline data collected at the pristine condition of the structure. However, it has been reported that this type of pattern comparison with the baseline data can lead to increased false alarms due to its susceptibility to varying operational and environmental conditions of the structure. To develop a more robust damage diagnosis technique, a new concept of NDT is conceived so that cracks can be detected without direct comparison with previously obtained baseline data. The proposed NDT technique utilizes the polarization characteristics of the piezoelectric wafers attached on the both sides of the thin metal structure. Crack formation creates Lamb wave mode conversion due to a sudden change in the thickness of the structure. Then, the proposed technique instantly detects the appearance of the crack by extracting this mode conversion from the measured Lamb waves even at the presence of changing operational and environmental conditions. Numerical and experimental results are presented to demonstrate the applicability of the proposed technique to crack detection.

The Study of Formation of Ti-silicide deposited with composite target(I) (Composite target으로 증착된 Ti-silicide의 형성에 관한 연구(I))

  • Choe, Jin-Seok;Gang, Seong-Geon;Hwang, Yu-Sang;Baek, Su-Hyeon;Kim, Yeong-Nam;Jeong, Jae-Gyeong;Mun, Hwan-Gu;Sim, Tae-Eon;Lee, Jong-Gil
    • Korean Journal of Materials Research
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    • v.1 no.3
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    • pp.168-174
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    • 1991
  • Ti-silicide was deposited by sputtering the composite target($TiSi_{2.6}$) on single-Si wafers and oxide on them. The heat treatment temperatures by rapid thermal annealing(RTA) have been varied in the range of $600-850^{\circ}C$ for 20seconds. It was not until RTA temperature was $800^{\circ}C$ that a stable $TiSi_2$ was formed, and the value of resistivity of that phase was $27~29{\mu}{\Omega}-cm$, which seems a little higher than that formed by the reactive method. The result of x-ray diffraction peals showed that till $750^{\circ}C$, C49 $TiSi_2$ phase was dominant, but at $800^{\circ}C$, at last, the phase was transformed into a stable C54 $TiSi_2$ phase. And, the result of x-ray photoeletron spectroscopy(XPS) measurements showed that the composition ratio of Ti and Si was 2 1 in the case of specimens treated at $800^{\circ}C$, The surface roughness of $TiSi_2$, which was condidered a weak point, was improved to a superior value of $17{\pm}1nm$, therefore increasing the possibility of applying $TiSi_2$ to semiconductor devices.

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Ultra Dry-Cleaning Technology Using Supercritical Carbon Dioxide (초임계 이산화탄소를 이용한 초순수 건식 세정기술)

  • Joung, Scung Nam;Kim, Sun Young;Yoo, Ki-Pung
    • Clean Technology
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    • v.7 no.1
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    • pp.13-25
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    • 2001
  • With fast advancement of fine machineries and semiconductor industries in recent decades, the ultra-cleaning of organic chemicals, submicron particles from contaminated unit equipments and products such as silicon wafers becomes one of the most important steps for further advancement of such industries. To date, two kinds of ultra cleaning techniques are used; one is the wet-cleaning and the other is the dry cleaning. In case of wet cleaning, removal of organic contaminants and submicron particles is made by DIW with additives such as $H_2O_2$, $H_2SO_4$, HCl, $NH_4OH$ and HF, etc. While the wet cleaning method is most widely adopted for various occasions, it is inevitable to discharge significant amount of toxic waste waters in environment. Dry cleaning is an alternative method to mitigate environmental pollution of the wet cleaning with maintaining comparable degree of cleaning to the wet cleaning. Although there are various concept of dry cleaning have been devised, the dry cleaning with environmentally-benign solvent such as carbon dioxide proven to show high degree of cleaning from the contaminated porous surface as well as from the bare surface. Thus, special global attention has been placing on this technique since it has important advantages of simple process schemes and no environmentally concern, etc. Thus, this article critically reviews the state-of-the-art of the supercritical fluid drying with emphasis on the thermo-physical characteristics of the supercritical solvent, environmental gains compared to other dry cleaning methods, and the generic aspects of the basic design and processing engineering.

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Fabrications and Characterization of High Temperature, High Voltage Ni/6H-SiC and Ni/4H-SiC Schottky Barrier Diodes (고온, 고전압 Ni/4H-SiC 및 Ni/6H-SiC Schottky 다이오드의 제작 및 전기적 특성 연구)

  • Lee, Ho-Seung;Lee, Sang-Wuk;Shin, Dong-Hyuk;Park, Hyun-Chang;Jung, Woong
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.11
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    • pp.70-77
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    • 1998
  • Ni/SiC Schottky diodes have been fabricated using epitaxial 4H-SiC and 6H-SiC wafers. The epitaxial n-type layers were grown on $n^{+}$ substrates, with a doping density of 4.0$\times$10$^{16}$ c $m^{-3}$ and a thickness of 10${\mu}{\textrm}{m}$. Oxide-termination has been adopted in order to obtain high breakdown voltage and low leakage current. The fabricated Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes show excellent rectifying characteristics up to the measured temperature range of 55$0^{\circ}C$. In case of oxide-terminated Schottky barrier diodes, breakdown voltage of 973V(Ni/4H-SiC) and 920V(Ni/6H-SiC), and a very low leakage current of less than 1nA at -800V has been observed at room temperature. On non-terminated Schottky barrier diodes, breakdown voltages were 430V(Ni/4H-SiC) and 160v(Ni/6H-SiC). At room temperature, SBH(Schottky Barrier Height), ideality factor and specific on-resistance were 1.55eV, 1.3, 3.6$\times$10$^{-2}$ $\Omega$.$\textrm{cm}^2$ for Ni/4H-SiC Schottky barrier diodes, and 1.24eV, 1.2, 2.6$\times$10$^{-2}$$\Omega$.$\textrm{cm}^2$/ for Ni/SH-SiC Schottky barrier diodes, respectively. These results show that both Ni/4H-SiC and Ni/6H-SiC Schottky barrier diodes are very promising for high-temperature and high power applications.s..

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Microstructural analysis of the single crystalline AlN and the effect of the annealing on the crystalline quality (단결정 AlN의 미세구조 분석 및 어닐링 공정이 결정성에 미치는 영향)

  • Kim, Jeoung Woon;Bae, Si-Young;Jeong, Seong-Min;Kang, Seung-Min;Kang, Sung;Kim, Cheol-Jin
    • Journal of the Korean Crystal Growth and Crystal Technology
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    • v.28 no.4
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    • pp.152-158
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    • 2018
  • PVT (Physical Vapor Transport) method has advantages in producing high quality, large scale wafers where many researches are being carried out to commercialize nitride semiconductors. However, complex process variables cause various defects when it had non-equilibrium growth conditions. Annealing process after crystal growth has been widely used to enhance the crystallinity. It is important to set appropriate temperature, pressure, and annealing time to improve crystallinity effectively. In this study, the effect of the annealing conditions on the crystalline structure variation of the AlN single crystal grown by PVT method was investigated with synchrotron whitebeam X-ray topography, electron backscattered diffraction (EBSD), and Rietveld refinement. X-ray topography analysis showed secondary phases, sub-grains, impurities including carbon inclusion in the single crystal before annealing. EBSD analyses identified that sub-grains with slightly tilted basal plane appeared and the overall number of grains increased after the annealing process. Rietveld refinement showed that the stress caused by the temperature gradient during the annealing process between top and bottom in the hot zone not only causes distortion of grains but also changes the lattice constant.