• Journal of the Optical Society of Korea
• /
• v.10 no.3
• /
• pp.124-129
• /
• 2006

We have developed a compact and cost-effective camera module on the basis of wafer-scale-replica processing. A multiple-layered structure of several aspheric lenses in a mobile-phone camera module is first assembled by bonding multiple glass-wafers on which 2-dimensional replica arrays of identical aspheric lenses are UV-embossed, followed by dicing the stacked wafers and packaging them with image sensor chips. This wafer-scale processing leads to at least 95% yield in mass-production, and potentially to a very slim phone with camera-module less than 2 mm in thickness. We have demonstrated a VGA camera module fabricated by the wafer-scale-replica processing with various UV-curable polymers having refractive indices between 1.4 and 1.6, and with three different glass-wafers of which both surfaces are embossed as aspheric lenses having $230{\mu}m$ sag-height and aspheric-coefficients of lens polynomials up to tenth-order. We have found that precise compensation in material shrinkage of the polymer materials is one of the most technical challenges, in orderto achieve a higher resolution in wafer-scaled lenses for mobile-phone camera modules.

• Proceedings of the IEEK Conference
• /
• 2005.11a
• /
• pp.793-796
• /
• 2005

In this paper, we propose a method which can improve uniformity of a miniaturized electron beam array for inspection of very small pattern with high speed using vertical interconnection. This method enables the individual control of columns so that it can reduce the deviation of beam current, beam size, scan range and so on. The test device that used vertical interconnection method was fabricated by multiple wafer bonding and metal reflow. Two silicon and one glass wafers were bonded and metal interconnection by melting of electroplated AuSn was performed. The contact resistance was under $10{\Omega}$.

• Proceedings of the KWS Conference
• /
• 2006.05a
• /
• pp.16-17
• /
• 2006

We researched by the characteristic of a anisotropic etching of Si wafer and the Si career concerning the flip chip solder bump. Connectors and Anisotropic Conductive Film (ACF) method was already applied to board-to-board interconnection. In place of them, we have focused on board to board interconnection with solder bump by Si carrier, which has been used as Flip chip bonding technology. A major advantage of this technology is that the Flexible Printed Circuit (FPC) is connected in the same solder reflow process with other surface mount devices. This technology can be applied to semiconductors and electronic devices for higher functionality, integration and reliability.

• Proceedings of the KSME Conference
• /
• 2003.11a
• /
• pp.1448-1452
• /
• 2003

A scratch tester was developed to evaluate the adhesive strength at interface between thin-film and substrate(silicon wafer). Under force control, the scratch tester can measure the normal and the tangential forces simultaneously as the probe tip of the equipment approaches to the interface between thin-film and substrate of wafer. The capacity of each component of force sensor is 0.1 N ${\sim}$ 100 N. In addition, the tester can detect the signal of elastic wave from AE sensor(frequency range of 900 kHz) attached to the probe tip and evaluate the bonding strength of interface. Using the developed scratch tester, the feasibility test was performed to evaluate the adhesive strength of thin-film.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
• /
• 2003.07a
• /
• pp.147-150
• /
• 2003

In this paper, We fabricated a high temperature pressure sensor using SBD(silicon- direct-bonding) wafer of $Si/SiO_2$/Si-sub structure. This sensor was very sensitive because the piezoresistor is fabricated by single crystal silicon of the first layer of SDB wafer. Also, it was possible to operate the sensor at high temperature over $120^{\circ}C$ which is the temperature limitation of general silicon sensor because the piezoresistor was dielectric isolation from silicon substrate using silicon dioxide of the second layer. The sensitivity of this sensor is very high as the measured result of D2200 shows $183.6\;{\mu}V/V{\cdot}kPa$. Also, the output characteristic of linearity was very good. This sensor was available at high temperature as $300^{\circ}C$.

• Proceedings of the KAIS Fall Conference
• /
• 2010.05b
• /
• pp.981-984
• /
• 2010

생산성 증가 및 비용 절감을 위해 반도체 공정 기술을 단순화 시키는 것이 필요하다. WBL(Wafer Backside Lamination) 기술을 이용해 필름(film) 형태로 얇은 다이접착제를 웨이퍼(wafer)에 접착하여 반도체 칩과 PCB를 붙이는 방법과 직접 PCB에 다이접착제를 붙이는 방법을 사용하면 획기적으로 공정을 단순화 시킬 수 있다. 하지만 Lamination 기법은 고온을 이용하여 모듈화된 PCB에 접착하므로 전도와 복사에 의해 주변 접착제 필름이 녹아 버리는 문제점이 발생한다. 본 연구에서는 고온으로 인한 필름 융해 현상을 방지하기 위하여 배크라이트를 설치하였으며 CFD 해석을 통해 PCB와 반도체 칩을 접착시킬 때 열이 PCB에 미치는 영향을 살펴보았다.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.7 no.3
• /
• pp.133-139
• /
• 2007

Future MEMS systems will be composed of larger varieties of devices with very different functionality such as electronics, mechanics, optics and bio-chemistry. Integration technology of heterogeneous devices must be developed. This article first deals with the current development trend of new fabrication technologies; those include self-assembling of parts over a large area, wafer-scale encapsulation by wafer-bonding, nano imprinting, and roll-to-roll printing. In the latter half of the article, the concept towards the heterogeneous integration of devices and functionality into micro/nano systems is described. The key idea is to combine the conventional top-down technologies and the novel bottom-up technologies for building nano systems. A simple example is the carbon nano tube interconnection that is grown in the via-hole of a VLSI chip. In the laboratory level, the position-specific self-assembly of nano parts on a DNA template was demonstrated through hybridization of probe DNA segments attached to the parts. Also, bio molecular motors were incorporated in a micro fluidic system and utilized as a nano actuator for transporting objects in the channel.

• Journal of the Semiconductor & Display Technology
• /
• v.1 no.1
• /
• pp.15-19
• /
• 2002

A new vacuum packaging process in wafer level is developed for the surface micromachining devices using glass silicon anodic bonding technology. The inside pressure of the packaged device was measured indirectly by the quality factor of the mechanical resonator. The measured Q factor was about 5$\times10^4$ and the estimated inner pressure was about 1 mTorr. And it is also possible to change the inside pressure of the packaged devices from 2 Torr to 1 mTorr by varying the amount of the Ti gettering material. The long-term stability test is still on the way, but in initial characterization, the yield is about 80% and the vacuum degradation with time was not observed.

• Proceedings of the Korean Society of Propulsion Engineers Conference
• /
• 2004.03a
• /
• pp.588-592
• /
• 2004

This paper presents the preliminary fabrication results of colloid thrusters which can provide thrust of the order of micro to milli-Newtons. MEMS technology has been used for fabrication, and four essential fabrication techniques - deep etching with nested masks, isotropic plasma etching, anisotropic reactive ion etching, and direct fusion wafer bonding - have been newly developed. Among diverse models which have been designed and fabricated, the fabrication results of 4-inch wafer-based colloid thrusters are presented.

• Journal of the Microelectronics and Packaging Society
• /
• v.25 no.4
• /
• pp.75-81
• /
• 2018

The effect of $Ar-N_2$ plasma treatment on Cu surface as one of solutions to realize reliable Cu-Cu wafer bonding was investigated. Structural characteristic of $Ar-N_2$ plasma treated Cu surface were analyzed using X-ray diffraction, X-ray photoelectron spectroscopy, atomic force microscope. Ar gas was used for a plasma ignition and to activate Cu surface by ion bombardment, and $N_2$ gas was used to protect the Cu surface from contamination such as -O or -OH by forming a passivation layer. The Cu specimen under high Ar partial pressure plasma treatment showed more copper oxide due to the activation on Cu surface, while Cu surface after high $N_2$ gas partial pressure plasma treatment showed less copper oxide due to the formation of Cu-N or Cu-O-N passivation layer. It was confirmed that nitrogen plasma can prohibit Cu-O formation on Cu surface, but nitrogen partial pressure in the $Ar-N_2$ plasma should be optimized for the formation of nitrogen passivation layer on the entire surface of Cu wafer.