• Proceedings of the KIEE Conference
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• 2003.04a
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• pp.276-280
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• 2003

This paper presents a zero voltage and zero current switching (ZVZCS) interleaving two-transistor forward converter for high input voltage and high power application. A phase shift has a disadvantage that a circulating current and RMS current stress, conduction losses of transformer and switching devices increases. Due to this circulating current and RMS current stress, conduction losses of transformer and switching devices increases. To alleviate these problems, we propose an improved interleaving two-transistor forward Zero Voltage and Zero Current Switching (ZVZCS) dc/dc converter using a tapped inductor a snubber capacitor and two snubber diodes attached at the secondary side of transformer. The proposed ZVZCS converter is verified on a 1.8kW, 5kHz experimental prototype.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.5
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• pp.431-437
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• 2022

This study proposes a converter that makes battery charging, discharging, and zero voltage control possible. The proposed topology consists of an LLC converter and a half-bridge inverter, and all power semiconductor devices are applied Si-MOSFETs. The topology is designed with an LLC switching frequency of 100 kHz, a half-bridge inverter switching frequency of 50 kHz, and a battery voltage of 5 V. The advantages of the charging/discharging operation of the 5 V battery voltage and the zero voltage control of the battery are verified. In addition, by using a two-stage topology, the battery can be charged, discharged through current control, and discharged to zero voltage. With the proposed topology, the current can be maintained even when the battery voltage drops to zero.

• The Transactions of the Korean Institute of Power Electronics
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• v.20 no.5
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• pp.464-470
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• 2015

In this paper, a non-isolated three-level high step-up boost converter with output voltage balancing is proposed. By adding one extra inductor to the conventional three-level boost converter, the proposed converter is derived. Compared with the traditional boost converter and the three-level boost converter, the proposed converter can obtain very high voltage conversion ratio, and the voltage and current stress of switching devices and diodes are reduced. A 2.7 kW prototype converter is built and tested to verify performances of the proposed converter.

• Journal of Power Electronics
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• v.17 no.6
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• pp.1391-1401
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• 2017

In this paper, a secondary resonance half-bridge dc-dc converter with an inductive output filter is presented. The primary side of such a converter utilizes asymmetric pulse width modulation (APWM) to achieve zero-voltage switching (ZVS) of the switches, and clamps the voltage of the switch to the input voltage. In addition, zero current switching (ZCS) of the output diode is achieved by a half-wave rectifier circuit with a filter inductor and a resonant branch in the secondary side of the proposed converter. Thus, the switching losses and diode reverse-recovery losses are eliminated, and the performance of the converter can be improved. Furthermore, an inductive output filter exists in the converter reduce the output current ripple. The operational principle, performance analysis and design equation of this converter are given in this paper. The analysis results show that the output diode voltage stress is independent of the duty cycle, and that the voltage gain is almost linear, similar to that of the isolation Buck-type converter. Finally, a 200V~380V input, 24V/2A output experimental prototype is built to verify the theoretical analysis.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.48 no.2
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• pp.89-96
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• 1999

This paper proposes a common-mode voltage reduction method base on SVPWM(Space-Vector Pulsewidth Modulation) in three phase PWM converter/inverter system. By shifting the active voltage vector of inverter and aligning this to the active vector of converter, it is possible to eliminate a common-mode voltage pulse in one control period. Since the proposed PWM method maintains the active voltage vector, it does not affect the control performance of PWM converter/inverter system. Without any extra hardware, overall common mode voltage dv/dt and conrresponding leakage current can be reduced to two-third of the conventional three phase symmetric SVPWM scheme.

• Proceedings of the KIEE Conference
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• 2001.04a
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• pp.240-243
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• 2001

This paper presents the digital controller using variable gain for single-phase power factor correction (PFC) converter. Generally, the gain of inner current control loop in single-stage PFC converter has a constant magnitude. This is why input current is distorted under low input voltage. In particular, a digital controller has more time delay than an analog controller which degrades characteristics of control loop. So, it causes the problem that the gain of current control loop isn't increased enough. In addition, the oscillation happens in the peak value of the input voltage open loop PFC system gain changes according to ac input voltage. These aspects make the design of the digital PFC controller difficult. In this paper, the improved digital control method for single-phase power factor converter is presented. The variable gain according to input voltage and input current help to improve current shape. The 800W converter is manufactured to verify the proposed control method.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.9
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• pp.96-102
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• 2015

This paper presents battery charging method using 3-phase AC-DC boost converter. General battery charging method is that charging the battery voltage to the reference voltage according to the constant current(CC) control, when it reaches the reference voltage, charging the battery fully according to the constant voltage(CV) control. However, battery chaging time is increased because of the battery impedance, constant current charging section which shoud take the large amount of charge is narrow, and constant voltage charging section which can generate insufficient charge is widen. To improve this problem, we proposes the method to reduce the charging time according to the SOC(State of Charge) estimation using battery impedance.

• Transactions on Electrical and Electronic Materials
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• v.14 no.5
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• pp.235-241
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• 2013

A low power CMOS control circuit is applied in an integrated DC-DC buck converter. The integrated converter is composed of a feedback control circuit and power block with 0.35 ${\mu}m$ CMOS process. A current-sensing circuit is integrated with the sense-FET method in the control circuit. In the current-sensing circuit, a current-mirror is used for a voltage follower in order to reduce power consumption with a smaller chip-size. The N-channel MOS acts as a switching device in the current-sensing circuit where the sensing FET is in parallel with the power MOSFET. The amplifier and comparator are designed to obtain a high gain and a fast transient time. The converter offers well-controlled output and accurately sensed inductor current. Simulation work shows that the current-sensing circuit is operated with an accuracy of higher than 90% and the transient time of the error amplifier is controlled within $75{\mu}sec$. The sensing current is in the range of a few hundred ${\mu}A$ at a frequency of 0.6~2 MHz and an input voltage of 3~5 V. The output voltage is obtained as expected with the ripple ratio within 1%.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.692-695
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• 1999

A new control scheme is proposed suitable for the three phase PWM converter having abrupt load variation such as a crane. In the converter used in a crane, the peak value of source voltage varies instantaneously due to the abrupt load variations. Such a voltage variation degrades the performance of DC-link control of PWM converter. To overcome this problem, load variations should be detected and compensated properly. We propose a new method for detecting and compensating the load variations without the additional hardware. With the proposed scheme, load variations are detected by estimating the current of DC-link capacitor. The estimated current information is feedbacked to a current controller to improve the performance. Additionally, the variation of source voltage is compensated using feedforward controller. The performance of the proposed scheme has been verified through simulations.

• Journal of Power Electronics
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• v.13 no.2
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• pp.177-185
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• 2013

This paper studies a soft switching DC/DC converter to achieve zero voltage switching (ZVS) for all switches under a wide range of load condition and input voltage. Two three-level PWM circuits with the same power switches are adopted to reduce the voltage stress of MOSFETs at $V_{in}/2$ and achieve load current sharing. Thus, the current stress and power rating of power semiconductors at the secondary side are reduced. The series-connected transformers are adopted in each three-level circuit. Each transformer can be operated as an inductor to smooth the output current or a transformer to achieve the electric isolation and power transfer from the input side to the output side. Therefore, no output inductor is needed at the secondary side. Two center-tapped rectifiers connected in parallel are used at the secondary side to achieve load current sharing. Due to the resonant behavior by the resonant inductance and resonant capacitance at the transition interval, all switches are turned on at ZVS. Experiments based on a 1kW prototype are provided to verify the performance of proposed converter.