• 제목/요약/키워드: voltage variation

검색결과 1,807건 처리시간 0.026초

Threshold Voltage Dependence on Bias for FinFET using Analytical Potential Model

  • Jung, Hak-Kee
    • Journal of information and communication convergence engineering
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    • 제8권1호
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    • pp.107-111
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    • 2010
  • This paper has presented the dependence of the threshold voltage on back gate bias and drain voltage for FinFET. The FinFET has three gates such as the front gate, side and back gate. Threshold voltage is defined as the front gate bias when drain current is 1 micro ampere as the onset of the turn-on condition. In this paper threshold voltage is investigated into the analytical potential model derived from three dimensional Poisson's equation with the variation of the back gate bias and drain voltage. The threshold voltage of a transistor is one of the key parameters in the design of CMOS circuits. The threshold voltage, which described the degree of short channel effects, has been extensively investigated. As known from the down scaling rules, the threshold voltage has been presented in the case that drain voltage is the 1.0V above, which is set as the maximum supply voltage, and the drain induced barrier lowing(DIBL), drain bias dependent threshold voltage, is obtained using this model.

IP 제어기를 이용한 통신 전원용 3상 PWM 컨버터의 전압 제어 (IP Voltage Controller of Three-phase PWM Converter for Power Supply of Communication System)

  • 신희근;김학원;조관열;지준근
    • 한국산학기술학회논문지
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    • 제12권6호
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    • pp.2722-2728
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    • 2011
  • 대용량 전원장치의 정류기는 입력전류의 고조파를 줄이기 위해, 입력 전류 제어기능을 갖는 3상 PWM 정류기의 적용이 확대되고 있다. 3상 PWM 정류기의 전압제어기는 일반적으로 PI 제어기가 사용되며, 출력 전압의 안정성을 얻고 신뢰성을 확보하기 위하여 전압 제어기는 출력전압의 과도상태에서 오버슈트(Overshoot)를 작게 설계한다. 그러나 부하 변동이 급격한 대용량 통신용 전원 장치에 3상 PWM 정류기가 적용될 경우 빠른 부하 변동에 대한 안정적 전압 응답을 얻기 위하여 보다 넓은 대역폭을 갖도록 전압 제어기를 설계할 필요가 있다. 넓은 대역폭을 갖는 PI 제어기는 과도한 출력전압의 오버슈트가 발생될 수 있으며, 이 과도한 출력전압 오버슈트는 통신용 전원의 안정성을 해칠 수 있다. 본 논문에서는 과도 상태에서 출력전압의 오버슈트를 작게 하기 위하여 IP 제어기를 갖는 3상 PWM 정류기의 전압 제어기를 제안한다. 제안된 전압 제어기는 3상 PWM 정류기의 기동 시와 부하 변동시의 과도 응답특성을 개선될 수 있음을 시뮬레이션 및 실험을 통해 확인하였다.

고속 Toggle 2.0 낸드 플래시 인터페이스에서 동적 전압 변동성을 고려한 설계 방법 (Adaptive Design Techniques for High-speed Toggle 2.0 NAND Flash Interface Considering Dynamic Internal Voltage Fluctuations)

  • 이현주;한태희
    • 전자공학회논문지
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    • 제49권9호
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    • pp.251-258
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    • 2012
  • SSD (Solid-state Drive), 더 나아가 SSS (Solid-state Storage System)와 같은 고성능 스토리지 요구 사항을 지원하기 위해 최근 낸드 플래시 메모리도 DRAM에서와 같이 SDR (Single Data Rate)에서 고속 DDR (Double Data Rate) 신호구조로 진화하고 있다. 이에 따라 PHY (Physical layer) 회로 기술을 적용하여 협소 타이밍 윈도우 내에서 유효 데이터를 안정적으로 래치하고, 핀 간 데이터 스큐를 최소화하는 것 등이 새로운 이슈로 부각되고 있다. 또한, 낸드 플래시 동작 속도의 증가는 낸드 플래시 컨트롤러의 동작 주파수 상승으로 이어지고 동작 모드에 따라 컨트롤러 내부 소모 전력 변동성이 급격히 증가한다. 공정 미세화와 저전력 요구에 의해 컨트롤러 내부 동작 전압이 1.5V 이하로 낮아지면서 낸드 플래시 컨트롤러 내부 전압 변화 마진폭도 좁아지므로 이러한 소모 전력 변동성 증가는 내부 회로의 정상 동작 범위를 제한한다. 컨트롤러의 전원전압 변동성은 미세공정으로 인한 OCV (On Chip Variation)의 영향이 증가함에 따라 더 심화되는 추세이고, 이러한 변동성의 증가는 순간적으로 컨트롤러의 보장된 정상 동작 범위를 벗어나게 되어 내부 로직의 오류를 초래한다. 이런 불량은 기능적 오류에 의한 것이 아니므로 문제의 원인 규명 및 해결이 매우 어렵게 된다. 본 논문에서는 낸드플래시 컨트롤러 내부의 비정상적 전원 전압 변동하에서도 유효 타이밍 윈도우를 경제적인 방법으로 유지할 수 있는 회로 구조를 제안하였다. 실험 결과 기존 PHY회로 대비 면적은 20% 감소한 반면 최대 데이터 스큐를 379% 감소시켜 동등한 효과를 보였다.

A Study of On-Chip Voltage Down Converter for Semiconductor Devices

  • Seo, Hae-Jun;Kim, Young-Woon;Cho, Tae-Won
    • 전기전자학회논문지
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    • 제12권1호
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    • pp.34-42
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    • 2008
  • This paper proposes a new on-chip voltage down converter(VDC), which employs a new reference voltage generator(RVG). The converter adopts a temperature-independence reference voltage generator, and a voltage-up converter. The architecture of the proposed VDC has a high-precision, and it was verified based on a 0.25${\mu}m$ 1P5M standard CMOS technology. For 2.5V to 1.0V conversion, the RVG circuit has a good characteristics such as temperature dependency of only 0.2mV/$^{\circ}C$, and the voltage-up circuit has a good voltage deviation within ${\pm}$0.12% for ${\pm}$5% variation of supply voltage VDD. The output voltage is stabilized with ${\pm}$1mV for load current varying from 0 to 100mA.

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Magnetic Field Analysis of 1 MVA HTS Transformer Windings

  • Park, Chan-Bae;Kim, Woo-Seok;Lee, Sang-Jin;Han, Jin-Ho;Park, Kyeong-Dal;Joo, Hyeong-Gil;Hong, Gye-Won;Hahn, Song-Yop
    • 한국초전도ㆍ저온공학회논문지
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    • 제5권1호
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    • pp.66-70
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    • 2003
  • In a HTS transformer, the perpendicular component of magnetic flux density ($B_r$) applied to HTS tapes of pancake windings becomes larger than that of solenoid winding, thereby decreasing the critical current in the HTS tapes. This paper introduces several methods to reduce $B_r$ applied to the HTS tapes in the transformer with double pancake windings by changing winding arrangements and the relative permeability of flux diverters. We have conducted a winding design for a single-phase 1MVA 22.9kV/6.6kV HTS transformer. We observed a change of $B_r$ due to a variation of gap-length between the high voltage windings and the low voltage windings, reciprocal arrangement and an increase of the number of the high voltage pancake. We also observed a change of Br on the HTS tapes due to variation of the relative permeability of flux diverters placed between the high voltage winding and the low voltage winding. Finally, we have designed a 1MVA 22.9kV/6.6kV HTS transformer winding using suggested methods and calculated transformer parameters by the 3D finite element method.

소결온도에 따른 ZnO 바리스터의 내환경 특성 (Environmental Properties of ZnO Varistors with Variation of Sintering Temperature)

  • 이성갑;조현무;이종덕;박상만
    • 한국전기전자재료학회논문지
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    • 제18권12호
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    • pp.1111-1116
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    • 2005
  • ZnO varistor ceramics added a glass-frit 0.03 $wt\%$ were fabricated with variation of sintering temperature. The sintering temperature and time were $1125^{\circ}C\~1200^{\circ}C$ and 2 h. The average grain sizes increased and the varistor voltage decreased with increasing the sintering temperature. The values of the specimen sintered at $1200^{\circ}C$ were $23.7\;{\mu}m$ and 329 V, respectively. The leakage current of all specimens was less than $1\;{\mu}A$ at DC $82\%$ of varistor voltage. The clamping voltage ratio of the specimen sintered at $1175^{\circ}C$ was 1.37. The endurance of surge current and the deviation of varistor voltage of the specimen sintered at $1175^{\circ}C$ were 6400 $A/cm^2$ and ${\Delta}-2.81\%$, respectively. After the High Temperature Load Test(HTLT) at $85^{\circ}C$ for 1000 h, the specimen sintered at $1175^{\circ}C$ showed the lowest deviation of varistor voltage of ${\Delta}-1.92\%$.

전압 주파수와 파형 폭 변화에 따른 유리의 미세 전해 방전 가공 성능에 대한 실험 (The Experiment on the effect of variations of voltage frequency and duty r on the electrochemical discharge machining of Pyrex glass)

  • 이정용;안유민;안시홍;박치현;김용권
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1999년도 하계학술대회 논문집 G
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    • pp.3307-3309
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    • 1999
  • Electrochemical discharge machining (ECDM) is a very recent technique in the fabrication of the micro-electro-mechanical system ( MEMS ) devices. This paper presents the experimental results of the machining of micro-holes on pyrex glass substrates by use of ECDM. Electrolyte is used with a KOH aqueous solution, cathode with copper, anode with platinum, and tool feed system is applied with gravity feed system. Already established experimental results were taken under the condition of constant voltage frequency. However in this paper, the effect of variation of the voltage frequency and duty ratio is considered. In this experiment, it is measured the ECDM performances with variation of the voltage frequency and duty ratio under the conditions of constant other machining variables. ECDM performances are described by the hole depth, and the top hole diameter.

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Design of charge pump circuit for analog memory with single poly structure in sensor processing using neural networks

  • Chai, Yong-Yoong;Jung, Eun-Hwa
    • 센서학회지
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    • 제12권1호
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    • pp.51-56
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    • 2003
  • We describe a charge pump circuit using VCO (voltage controlled oscillator) for storing information into local memories in neural networks. The VCO is used for adjusting the output voltage of the charge pump to the reference voltage and for reducing the fluctuation generated by the clocking scheme. The charge pump circuit is simulated by using Hynix 0.35um CMOS process parameters. The proposed charge pump operates properly regardless to the temperature and the supply voltage variation.

연료전지의 정전압 특성을 위한 적응제어기 설계 (Design of an Adaptive Controller for Steady Voltage Characteristics of the Fuel Cell)

  • 현근호
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 학술대회 논문집 전문대학교육위원
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    • pp.51-54
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    • 2007
  • In this paper, the dynamic models of a SOFC are rearranged. It consists of electrochemical model, thermal model, voltage equation and several loss equations. Experiment results of the real SOFC system are shown to evaluate the steady voltage characteristics. Control problems on tracking steady voltage by air flow is discussed and an adaptive controller is designed to withstand to the variation of stack current. Simulation is done to prove the solution of control algorithms.

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침수조건에 따른 저압 지중함의 감전 위험성 평가 (The Assesment of Electric Shock Rate of Low Voltage Joint-Box Based Submerged Condition)

  • 심건보;김경철;김한상;김종민
    • 한국조명전기설비학회:학술대회논문집
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    • 한국조명전기설비학회 2007년도 춘계학술대회 논문집
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    • pp.265-270
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    • 2007
  • The potential and step voltage distribution around low voltage joint-box cover were simulated with the variation of resistivity of water, depth of submerged water and point of leakage current. The potential distribution is very high gradient around low voltage joint-box, this condition is very dangerous states.

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