• Journal of Power Electronics
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• v.15 no.4
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• pp.886-898
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• 2015

The design feasibility of a micro unidirectional DC transmission system based on an input-parallel output-parallel (IPOP) converter is analyzed in this paper. The system consists of two subsystems: an input-parallel output-series (IPOS) subsystem to step up the DC link voltage, and an input-series output-parallel (ISOP) subsystem to step down the output voltage. The two systems are connected through a transmission line. The challenge of the delay caused by the communication in the control system is addressed by introducing a ring communication structure, and its influence on the control system is analyzed to ensure the feasibility and required performance of the converter system under practical circumstances. Simulation and experiment results are presented to verify the effectiveness of the proposed design.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.63 no.11
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• pp.1622-1625
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• 2014

The main measurement uncertainty factors in DC high-voltage dividers for a national high-voltage standard are the measurement uncertainty of low-voltage arm and the stability of a high-voltage supply. In this study, the uncertainties by the two factors are greatly improved. As a result the measurement uncertainty for the DC high-voltage divider is reduced from $16{\times}10^{-6}(k=2)$ to $8{\times}10^{-6}(k=2)$ which is at international level.

• Proceedings of the KSR Conference
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• 2010.06a
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• pp.220-226
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• 2010

In this paper, the static overmodulation is proposed for the 2-phase full bridge inverter. The overmodulation strategy increases a fundamental output voltage and improves a voltage utilization up to the maximum in the overmodulation range. The linear modulation range and static overmodulation range are defined in the 2-phase full bridge inverter. The overmodulation strategies which increase a voltage utilization until the 4-step mode by linearization of the output voltage in overmodulation range are proposed. To maintain a linearity of the relation between a reference voltage and a fundamental output voltage, this paper suggests a compensation voltage, whose magnitude or phase is modified to the proposed control scheme. Simulation and experimentation results demonstrate the effectiveness of the proposed algorithms.

• Proceedings of the KIEE Conference
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• 1993.07b
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• pp.1193-1196
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• 1993

Electrical properties of $C_{22}$-Quinolium(TCNQ) Langmuir-Blodgett(LB) films are reported depending on a type of applied voltage on a type of applied voltage and temperature. A conductivity was identified to be anisotropic with a ratio of ${\sigma}||/{\sigma}{\bot}{\simeq}10^7$ at room temperature. The I-V characteristics along the film surface direction show an ohmic behavior up to a few hundred volts. But the I-V characteristics in the vertical direction display an ohmic behavior for low-electric field, and a nonohmic behavior for high-electric field. This nonohmic behavior has already been interpreted as a conduction mechanism of space-charge limited current and Schottky effect near the electric-field strengh of $10^6$ V/cm. When the electric field exceeds further, there is anormalous phenomia similiar to breakdown. From the study of I-V characteristics with the application of step or pulse voltage, we have found that the breakdown voltage shifts to higher one as the step or pulse interval becomes shorter. These results indicate that the breakdown is due to both electrical and thermal effect. To see the infulence of temperature, current was measured as function of temperature with several bias voltages, which are lower than that of breakdown. It shows that the current increases about 3 orders of magnitude near $60{\sim}70^{circ}C$, and remains constant for a while up to $140^{\circ}C$ and then suddenly drops. Arahidic acid was used to cmpare with $C_{22}$-Quinolium(TCNQ) LB films.

• Journal of Power Electronics
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• v.9 no.6
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• pp.854-865
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• 2009

Super-lift dc-dc converters are a series of advanced step-up dc-dc topologies that provide high voltage transfer gains by super-lift techniques. This paper presents a developed graphical modelling method for super-lift converters and gives a thorough analysis with a consideration of the effects caused by parasitic parameters and diodes' forward voltage drop. The general guidelines for constructing and deriving graphical models are provided for system analysis. By applying it to examples, the proposed method shows the advantages of high convenience and feasibility. Both the circuit simulation and experimental results are given to support the theoretical analysis.

• Proceedings of the KIEE Conference
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• 2003.07a
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• pp.455-457
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• 2003

In the present IEC 60427(2000), reduced applied voltage can be used for synthetic short-circuit making current tests if the maximum pre-arcing time of the test circuit breaker is less than $1/{\omega}$. But in the near future IEC, only the making tests with full test voltage shall be allowed. To meet this trend, KERI is preparing synthetic making test facilities using step-up transformer, ITMC and plasma making switch. This paper presents analytical characteristics of KERI's synthetic short-circuit making test circuits. The results of this paper can be useful for effective and adequate tests.

• Journal of Power Electronics
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• v.4 no.1
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• pp.18-27
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• 2004

The output storage capacitor of the PFC converters is commonly designed for the selected hold-up time or the allowed output ripple voltage percentage. Nevertheless, this output capacitor is a main contribution factor to the PFC system stability. Moreover, seeking for a minimum output storage capacitor that assures the PFC desired operation under all condition, and providing the advantage of a small size and low cost is the main interesting target for engineering. Therefore, in this issue the design steps of the PFC converter have been discussed depending on three choices, output ripple, hold-up time, and stability. It is cleared that any design must take the minimum required storage capacitor for stability prospective as step-l in deign, then apply for any other specification like hold-up time or ripple percentage.

• The Transactions of the Korean Institute of Power Electronics
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• v.13 no.3
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• pp.196-205
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• 2008

A noble polarity inversion dc/dc power conversion circuit that has the high input-output voltage conversion ration characteristics is presented for high voltage DC power supply applications. The proposed circuit features the reduced voltage stresses of the component compared to those of the conventional ones. The operational principles of the proposed circuit is analyzed and comparative features are presented. The simulation results and experimental results are presented to verify the validity of the proposed circuit.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.706-711
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• 2014

A low power 6-bit flash ADC that uses an input voltage range detection algorithm is described. An input voltage level detector circuit has been designed to overcome the disadvantages of the flash ADC which consume most of the dynamic power dissipation due to comparators array. In this work, four digital input voltage range detectors are employed and each input voltage range detector generates the specific clock signal only if the input voltage falls between two adjacent reference voltages applied to the detector. The specific clock signal generated by the detector is applied to turn the corresponding latched comparators on and the rest of the comparators off. This ADC consumes 68.82 mW with a single power supply of 1.2V and achieves 4.3 effective number of bits for input frequency up to 1 MHz at 500 MS/s. Therefore it results in 4.6 pJ/step of Figure of Merit (FoM). The chip is fabricated in 0.13-um CMOS process.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.36S no.11
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• pp.128-139
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• 1999

This paper proposes a linearization technique for the space vector modulation method, which increases the linear control range of inverter up to the 6-step inverter. This method is based on fourier series expansion of the desired output voltage of the inverter to calculate the compensation angle in continuous switching mode and holding angle in discontinuous switching including the 6-step mode respectively. The approximation equation of these angles are used for compensation of fundamental voltage in overmodulation range. Therefore, it is possible to obtain the linear control and the maximized utilization of PWM inverter output voltage.