• Journal of the Korea Institute of Information and Communication Engineering
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• v.24 no.2
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• pp.325-328
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• 2020

This paper demonstrated a voltage-controlled oscillator (VCO) using cost-effective (1-poly 6-metal) mixed signal standard CMOS process. To have the high-quality factor inductor in LC resonator with thin metal thickness, patterned-ground shields (PGS) was adopted under the spiral to effectively reduce the ac current of low resistive Si substrate. And, because of thin top-metal compared with that of RF option (2 ㎛), we make electrically connect between the top metal (M6) and the next metal (M5) by great number of via array along the metal traces. The circuit operated from 2.48 GHz to 2.62 GHz tuned by accumulation-mode varactor device. And the measured phase noise of LC VCO has -123.7 dBc/Hz at 1MHz offset at 2.62 GHz and the dc-power consumption shows 2.07 mW with 1.8V supply voltage, respectively.

• Progress in Superconductivity
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• v.2 no.2
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• pp.71-75
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• 2001

The effect of annealing step-edges of LaAlO$_3$ and MgO single crystal substrates on YBa$_2$Cu$_3$O$_{7}$ junction has been studied. The step-edge was fabricated by argon ion milling and was annealed at 105$0^{\circ}C$ in 1 attn oxygen pressure. We compared AFM image near step-edge of the substrates between before and after annealing process. And YBa$_2$Cu$_3$O$_{7}$ thin film was deposited on the step-edge by a standard pulsed laser deposition. The step-edge junctions were characterized by current-voltage curves at 77 K. The annealing of step-edges of MgO substrate improved the current-voltage characteristic of Josephson junction: double steps in the current-voltage characteristic disappeared. However the annealing for LaAlO$_3$ did not improve the junction property.rty.

• Journal of Power Electronics
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• v.12 no.1
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• pp.215-222
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• 2012

Lighting represents a significant component of commercial buildings, particularly office buildings. Fluorescent lighting is invariably used in all commercial, industrial and residential areas. A significant amount of lighting energy is wasted every day by leaving the lights on and not utilizing daylight energy. However, if daylight illuminance can be harnessed, this will reduce the electricity consumption of fluorescent lamps and save energy. This paper explains possible significant savings in lighting energy consumption and hence in costs, without reducing the performance and visual satisfaction in office or industrial buildings. It is proposed to obtain energy saving by reducing the supply voltage without degradation in lighting performance. Experimental results confirm that as much as 20% of electrical energy can be saved by reducing about 9% of the supply voltage, without noticeably affecting light output while complying with lighting standard limits.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.29 no.1
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• pp.121-127
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• 2015

Recently, LVDC(Low Voltage Direct Current) has been came into the newly spotlight with HVDC(High Voltage Direct Current) and as increasing digital load, DC power supply and high quality of demand is also getting extended. In accordance with the report of EPRI(Electric Power Research Institute), they expect digital load will grow to 50% of whole load in 2020. Subsequently, the use of DC equipment will grow dramatically. Therefore, the careful adoption of LVDC standardization policy is urgently required for the safety of people, prevention of confusion and occupancy of the market.

• Journal of Sensor Science and Technology
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• v.14 no.1
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• pp.28-32
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• 2005

In this paper, a CMOS integrated detection circuit for capacitive type fingerprint sensor signal processing is described. We designed a detection circuit of charge-sharing sensing scheme. The proposed detection circuit increases the voltage difference between a ridge and valley. The test chip is composed of $160{\times}192$ array sensing cells (12 by $12.7{\;}mm^{2}$). The chip was fabricated on a 0.35 m standard CMOS process. Measured difference voltage between a ridge and valley was 0.95 V.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.31-35
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• 2001

IGCTs have established themselves as the power semiconductor of choice at medium voltage levels within the last few years because of their low conduction and switching losses. The trade-off between these losses can be adjusted by various lifetime control techniques and the growing demand for these devices is driving the need for standard types to cover such applications as Static Circuit Breakers (low on-state) and Medium Voltage Drives (low switching losses). The additional demands of Traction (low operating temperatures) and Current Source Inverters (symmetric blocking) would normally result in conflicting demands on the semiconductor. This paper will outline how a range of power devices can meet these needs with a limited number of wafers and gate units. Some of the key differences between IGCTs and IGBTs will be explained and the outlook for device improvements will be discussed.

• IEIE Transactions on Smart Processing and Computing
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• v.4 no.5
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• pp.330-339
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• 2015

Power quality (PQ) problems are becoming a big issue, since delicate complex electronic devices are widely used. We present a new denoising technique using discrete wavelet transform (DWT), where a modified correlation thresholding is used in order to reliably detect the PQ disturbances. We consider various PQ disturbances on the basis of IEEE-1159 standard over noisy environments, including voltage swell, voltage sag, transient, harmonics, interrupt, and their combinations. These event signals are decomposed using DWT for the detection of disturbances. We then evaluate the PQ disturbance detection ratio of the proposed denoising scheme over Gaussian noise channels. Simulation results also show that the proposed scheme has an improved signal-to-noise ratio (SNR) over existing scheme.

• JSTS:Journal of Semiconductor Technology and Science
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• v.12 no.3
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• pp.255-265
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• 2012

This paper presents a 15-GHz multiphase rotary traveling-wave voltage-controlled oscillator (RTW VCO) where a shielded coplanar stripline (CPS) is exploited to provide better shielding protection and lower phase noise at a moderate cost of characteristic impedance and power consumption. Test chips were implemented in a standard 90-nm CMOS process, demonstrating the measured results of 2-GHz frequency tuning range, -11.3-dBm output power, -109.6-dBc/Hz phase noise at 1-MHz offset, and 2-ps RMS clock jitter at 15 GHz. The chip core occupies the area of $0.2mm^2$ and dissipates 12 mW from a single 1.2-V supply.

• Journal of information and communication convergence engineering
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• v.9 no.3
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• pp.301-304
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• 2011

This paper describes the possibility of a low-power, high-resolution fingerprint sensor chip. A modified capacitive detection circuit of charge sharing scheme is proposed, which reduces the static power dissipation and increases the voltage difference between a ridge and valley more than conventional circuit. The detection circuit is designed and simulated in 3.3V, 0.35${\mu}$m standard CMOS process, 40MHz condition. The result shows about 27% power dissipation reduction and 90% improvement of difference between a ridge and valley sensing voltage. The proposed circuit is more stable and effective than a typical circuit.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1632-1633
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• 2011

In IEC 62305-1 standard, the simple circuit consisting of RLC is used in order to form the fast rise time of 0.25/100 ${\mu}s$. But this circuit is very expensive system because the system is needed very high charging voltage up to 3.5 MV. In this paper, we suggest the generator which generates the current up to 10 kA by using the low charging voltage of the dozen kV. Therefore the generator was installed then we compared measure results with calculated results.