• 센서학회지
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• 제23권1호
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• pp.24-28
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• 2014

A lock-in amplifier was proposed for capacitive sensor applications. This amplifier was based on a general-purpose microcontroller and had only a charge amplifier as analog circuits. All the other functions of lock-in amplifier except for the charge amplifier were implemented with firmware and the internal resources of the microcontroller. A rectangular signal, generated by the microcontroller, was used in a sensor-driving signal instead of a conventional sinusoidal signal. This makes it possible that the phase comparison circuit in the lockin amplifier is made with analog-to-digital converter, a timer and an interrupt controller. Using the oversampling method and the rectangular driving signal, we can make it easy to implement the peak detection function with software and sample the peak-to-peak signal at charge amplifier output. A charge amplifier was proposed to cancel out the base capacitance existing in capacitive sensors structurally. The experimental results show that the lock-in amplifier operating in the supply voltage of 3.0 V cancels out the base capacitance and has good linearity.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 1998년도 하계종합학술대회논문집
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• pp.433-436
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• 1998

Hot carrier induceed the performance degradation of sense amplifier circuit in DRAM has been measured and analyzed using 0.8.mu.m CMOS process. Simulation and experimental results show that the degradation of the MOS devices affects the decrease of the half-Vcc, voltage gain and the increase of the sensing voltage gain and the increase of the sensing voltage. The dominant degradation mechanism is the capacitance imblance in the bit-line pair. We carried out the spice simulation to investigate the degradation of the sense amplifier circuit.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 합동 추계학술대회 논문집 정보 및 제어부문
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• pp.517-520
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• 2002

This paper has been studied Operational Amplification Circuit that has high power specification of 90 W is designed. In the input differential amplifier stage, the current source for circuit bias is designed to protect device from high voltage source. the criving state has the voltage gain more than input differential stage. With temperature compensation design, output stage works stable in different to temperature.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2003년도 춘계학술대회논문집
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• pp.153-156
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• 2003

Many researchers have tried to develop the piezoelectric shell element and verified them with the benchmarking problem of the piezoelectric bimorph beam since there is no experimental result for the control of shell structure with piezoelectric sensor/actuator. In this paper, the experiments are designed and performed to verify the control Performance of piezoelectric sensor/actuator on the shell structure. PVDF is easy to be attached on the surface of a shell structure but makes weak control forces. On the contrary, PZT makes control forces large enough to control the structure, but it is not easy to make a PZT element with curvature. To use PVDF as an actuator, the structure should be designed as flexible as possible and the voltage amplifier could make high control voltage. PVDF actuator powered by a voltage amplifier that generates output voltage from -200 to +200 volts, shows little control performance to control the vibration of an arch type shell structure. The performance of sensor looks good and the negative velocity feedback control works perfectly. The actuator voltage seems to be too small to verify the control effect Quantitatively. An experiment with high voltage amplifier is scheduled to verify the control effect Quantitatively.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.2145-2147
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• 1998

This paper presents a Class-D type switched mode audio power amplifier employing ZVT(Zero-Voltage-Transition) soft switching technique. In order to obtain a wide bandwidth and lower distortion for an audio amplifier a high switching frequency is essential. The ZVT switching scheme enables a high frequency switching without sacrificing the efficiency much as in a hard switching. A prototype amplifier is built to demonstrate the feasibility of this technique for the audio power amplifier.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 ITC-CSCC -2
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• pp.941-944
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• 2000

This paper proposes, for the first time, the design of class I pull-push power amplifier. With the new design, the output power is increased by four times when compared to conventional single-end class I connection amplifier with the same supply voltage. The performance of the proposed amplifier is verified by with a 100-kHz power amplifier constructed using general-purpose NPN transistors.

• 한국정보기술학회 영문논문지
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• 제8권2호
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• pp.59-67
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• 2018

The minimum power supply voltage of a typical bandgap current reference (BGCR) is limited by operating temperature and input common mode range (ICMR) of a feedback amplifier. A new BGCR using a bandgap voltage generator (BGVG) is proposed to minimize the effect of temperature, supply voltage, and process variation. The BGVG is designed with proportional to absolute temperature (PTAT) characteristic, and a feedback amplifier is designed with weak-inversion transistors for low voltage operation. It is verified with a $0.18-{\mu}m$ CMOS process with five corners for MOS transistors and three corners for BJTs. The proposed circuit is superior to other reported current references under temperature variation from $-40^{\circ}C$ to $120^{\circ}C$ and power supply variation from 1.2 V to 1.8 V. The total power consumption is $126{\mu}W$ under the conditions that the power supply voltage is 1.2 V, the output current is $10{\mu}A$, and the operating temperature is $20^{\circ}C$.

• ETRI Journal
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• 제29권2호
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• pp.212-218
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• 2007

A novel low-voltage CMOS current feedback operational amplifier (CFOA) is presented. This realization nearly allows rail-to-rail input/output operations. Also, it provides high driving current capabilities. The CFOA operates at supply voltages of ${\pm}0.75V$ with a total standby current of 304 ${\mu}A$. The circuit exhibits a bandwidth better than 120 MHz and a current drive capability of ${\pm}1$ mA. An application of the CFOA to realize a new all-pass filter is given. PSpice simulation results using 0.25 ${\mu}m$ CMOS technology parameters for the proposed CFOA and its application are given.

• 전자공학회논문지C
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• 제34C권6호
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• pp.37-43
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• 1997

In this paper, an analog-domain powr-reduction technique for a low-voltage CMOS operational amplifier and its application to clock-based VLSI systems are proposed. The proposed technique cuts off the bias current of the op amp during a half cycle of the clock in the sleeping mode and resumes the curent supply sequentially during the remaining cycle of the clock in the normal operating mode. The proposed sequential sbiasing technique reduces about 50% of the op amp power and improves the circuit performance through high phase margin and stable settling behavior of the output voltage. The power-reduction technique is applied to a sample-and-hold amplifier which is one of the critical circuit blocks used in the front-end stage of analog and/or digital integrated systems. The SHA was simulated and analyzed in a 0.8.mu.m n-well double-poly double-metal CMOS technology.

• JSTS:Journal of Semiconductor Technology and Science
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• 제7권2호
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• pp.98-101
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• 2007

A fully integrated 5-GHz CMOS power amplifier for IEEE 802.11a WLAN applications is implemented using $0.18-{\mu}m$ CMOS technology. An on-chip transmission-line transformer is used for output matching network and voltage combining. Input balun, inter-stage matching components, output transmission line transformer and RF chokes are fully integrated in the designed amplifier so that no external components are required. The power amplifier occupies a total area of $1.7mm{\times}1.2mm$. At a 3.3-V supply voltage, the amplifier exhibits a 22.6-dBm output 1-dB compression point, 23.8-dBm saturated output power, 25-dB power gain. The measured power added efficiency (PAE) is 20.1 % at max. peak, 18.8% at P1dB. When 54 Mbps/64 QAM OFDM signal is applied, the PA delivers 12dBm of average power at the EVM of -25dB.