• Journal of Broadcast Engineering
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• v.20 no.5
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• pp.756-769
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• 2015

In this paper, we propose a scalable coding method for high dynamic range (HDR) and standard dynamic range (SDR) videos based on Scalable High Efficiency Video Coding (SHVC). The proposed method has multi-layer coding architecture that consists of base layer for SDR videos and enhancement layer for HDR videos to support the backward compatibility with legacy codec and display devices. Also, to improve coding efficiency of enhancement layers, a global inverse tone mapping is applied to the reconstructed SDR video and the compensated frames are referred for coding of the enhancement layer. The proposed method is found to achieve BD-Rate gain of 43.0% on average (maximum 76.3%) for the enhancement layer and 15.7% on average (maximum 31%) for dual-layer against the SHM 7.0 reference software.

• Journal of Broadcast Engineering
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• v.17 no.5
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• pp.876-890
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• 2012

In this paper, we investigated the performances of the distributed video codec with adaptive Gray code to apply for frame-difference signal. That is, the best cases and the worst cases were analyzed and compared by considering the statistical characteristics of the frame difference signal in view of the Gray code allocation. Through computer simulations, if 9-bit data for frame difference signal is generated for luminance signal with 8-bit definition and so n-bit is allocated to the quantized coefficient, we were able to find the best method to reduce the virtual channel noise by adding $256+2^{9-n-1}$ to the frame difference signal. Through computer simulation with test video sequences, it was shown that the performance difference between the best cases and the worst cases is larger than about 1.5dB at same rate. It is expected that the results in this paper are applicable for the transform-domain scheme as well as the pixel-domain scheme.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.1
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• pp.27-34
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• 2021

In this paper, we propose a copyright protection scheme for real-time streaming of HEVC(High Efficiency Video Coding) based realistic content. Previous research uses encryption and modular operation for copyright pre-protection and copyright post-protection, which causes delays in ultra high resolution video. The proposed scheme maximizes parallelism by using thread pool based DRM(Digital Rights Management) packaging with only HEVC's CABAC(Context Adaptive Binary Arithmetic Coding) codec and GPU based high-speed bit operation(XOR), thus enabling real-time copyright protection. As a result of comparing this scheme with previous research at three resolutions, PSNR showed an average of 8 times higher performance, and the process speed showed an average of 18 times difference. In addition, as a result of comparing the robustness of the forensic mark, the filter and noise attack, which showed the largest and smallest difference, with a 27-fold difference in recompression attacks, showed an 8-fold difference.

• Journal of Broadcast Engineering
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• v.25 no.3
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• pp.346-352
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• 2020

Versatile Video Coding (VVC), a next-generation video coding standard that is in the final stage of standardization, has adopted various techniques to achieve more than twice the compression performance of HEVC (High-Efficiency Video Coding). VVC adopted Bi-prediction with CU-level Weight (BCW), which generates the final prediction signal with the weighted combination of bi-predictions with various weights, to enhance the performance of the bi-predictive inter prediction. The syntax element of the BCW index is adaptively coded according to the value of NoBackwardPredFlag which indicates if there is no future picture in the display order among the reference pictures. Such syntax structure for signaling the BCW index could violate the flexibility of video codec and cause the dependency issue at the stage of bitstream parsing. To address these issues, this paper proposes an efficient BCW weight signaling method which enables all weights and parsing without any condition check. The performance of the proposed method was evaluated with various weight searching methods in the encoder. The experimental results show that the proposed method gives negligible BD-rate losses and minor gains for 3 weights searching and 5 weights searching, respectively, while resolving the issues.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.8C
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• pp.1113-1124
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• 2004

In this paper, we proposed a hardware(H/W) structure which can compress and recontruct the input image in real time operation and implemented it into a FPGA platform using VHDL(VHSIC Hardware Description Language). All the image processing element to process both compression and reconstruction in a FPGA were considered each of them was mapped into H/W with the efficient structure for FPGA. We used the DWT(discrete wavelet transform) which transforms the data from spatial domain to the frequency domain, because use considered the motion JPEG2000 as the application. The implemented H/W is separated to both the data path part and the control part. The data path part consisted of the image processing blocks and the data processing blocks. The image processing blocks consisted of the DWT Kernel fur the filtering by DWT, Quantizer/Huffman Encoder, Inverse Adder/Buffer for adding the low frequency coefficient to the high frequency one in the inverse DWT operation, and Huffman Decoder. Also there existed the interface blocks for communicating with the external application environments and the timing blocks for buffering between the internal blocks The global operations of the designed H/W are the image compression and the reconstruction, and it is operated by the unit of a field synchronized with the A/D converter. The implemented H/W used the 69%(16980) LAB(Logic Array Block) and 9%(28352) ESB(Embedded System Block) in the APEX20KC EP20K600CB652-7 FPGA chip of ALTERA, and stably operated in the 70MHz clock frequency. So we verified the real time operation of 60 fields/sec(30 frames/sec).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.53-60
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• 2009

Motion estimation for H.264/AVC video CODEC is very complex and requires a huge amount of computational efforts because it uses multiple reference frames and variable block sizes. We propose the architecture of high-performance integer-pixel motion estimation circuit based on fast algorithms for multiple reference frame selection, block matching, block mode decision and motion vector estimation. We also propose the architecture of high-performance interpolation circuit for sub-pixel motion estimation. We described the RTL circuit in Verilog HDL and synthesized the gate-level circuit using 130nm standard cell library. The integer-pixel motion estimation circuit consists of 77,600 logic gates and four $32\times8\times32$-bit dual-port SRAM's. It has tile maximum operating frequency of 161MHz and can process up to 51 D1 (720$\times$480) color in go frames per second. The fractional motion estimation circuit consists of 22,478 logic gates. It has the maximum operating frequency of 200MHz and can process up to 69 1080HD (1,920$\times$1,088) color image frames per second.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.1B
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• pp.8-17
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• 2004

In this paper: we propose the adaptive error concealment technique for scalable video coding over wireless network error prove environment. We prove it is very effective that Error concealment techniques proposed in this paper are applied to scalable video data. In this paper, we propose two methods of error concealment. First one is that the en·or is concealed using the motion vector of base layer and previous VOP data. Second one is that according to existence of motion vector in error position, the error is concealed using the same position data of base layer when the motion vector is existing otherwise using the same position data of previous VOP when the motion vector is 0(zero) adaptively. We show that according to various error pattern caused by condition of wireless network and characteristics of sequence, we refer decoder to base layer data or previous enhancement layer data to effective error concealment. Using scalable coding of MPEG-4 In this paper, this error concealment techniques are available to be used every codec based on DCT.

• Journal of the Institute of Convergence Signal Processing
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• v.4 no.2
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• pp.31-39
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• 2003

The MPEG-2 source coding algorithm is very sensitive to transmission errors due to using of variable-length coding. When the compressed data are transmitted, transmission errors are generated and error correction scheme is not able to be corrected well them. In the decoder error concealment (EC) techniques must be used to conceal errors and it is able to minimize degradation of video quality. The proposed algorithm is method to conceal successive macroblock errors of I-frame and utilize temporal information of B-frame and spatial information of P-frame In the previous GOP which is temporally the nearest location to I-frame. This method can improve motion distortion and blurring by temporal and spatial errors which cause at existing error concealment techniques. In network where the violent transmission errors occur, we can conceal more efficiently severe slice errors. This algorithm is Peformed in MPEG-2 video codec and Prove that we can conceal efficiently slice errors of I-frame compared with other approaches by simulations.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2014.06a
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• pp.254-257
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• 2014

Recently, various applications using real-time face detection have been developed as face recognition technology and hardware grows. While network service is developing and video instruments costs lower, it is needed that smart surveillance camera and service using network camera based on IP and face detection technology. However, videos should be compressed for reducing network bandwidth and storage capacity in surveillance system. As it requires high-level improvement of system performance when all the compressed frames are processed in a face detection program, fast face detection method is needed. In this paper, not only a fast way of algorithm using Haar like features and adaboost learning and motion information but also an application on broadcast system is suggested.

• Journal of Korea Multimedia Society
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• v.13 no.4
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• pp.575-581
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• 2010

With widespread use of the Internet and improvements in streaming media and compression technology, digital music, video, and image can be distributed instantaneously across the Internet to end-users. However, most conventional Digital Right Management are often not secure and not fast enough to process the vast amount of data generated by the multimedia applications to meet the real-time constraints. The SVC offers temporal, spatial, and SNR scalability to varying network bandwidth and different application needs. Meanwhile, for many multimedia services, security is an important component to restrict unauthorized content access and distribution. This suggests the need for new cryptography system implementations that can operate at SVC. In this paper, we propose a new scrambling encryption for reserving the characteristic of scalability in MPEG4-SVC. In the base layer, the proposed algorithm is applied and performed the selective scambling. And it encrypts various MVS and intra-mode scrambling in the enhancement layer. In the decryption, it decrypts each encrypted layers by using another encrypted keys. Throughout the experimental results, the proposed algorithms have low complexity in encryption and the robustness of communication errors.