• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2000년도 하계종합학술대회 논문집(1)
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• pp.61-64
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• 2000

In this paper, we design up-down converter for asynchronous IMT-2000 base station using W-CDMA(Wideband Code Division Multiple Access) technology. This up-down converter(UDC) has AGC (Automatic Gain Control), TPTL(Transmitting Power Tracing Loop), RSSI(Received Signal Strength Indicator) function. And for the cell control of BS(Base Station), breathing, blossoming, wilting function also available. This UDC has diversity structure for better performance.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(5)
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• pp.207-210
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• 2002

This paper describes a design of multiple-mode single-output DC/DC converter which can be used in both up and down conversion. Proposed up/down converter does not produce a negative voltage which is generated in conventional buck-boost type converter. Three types of operation mode(up/down/bypass) are controlled by the input voltage sense and command signals of target output voltage. PFM(pulse frequency modulation) control is adopted and modified for fast tracking and for precise output voltage level with an aid of output voltage sense. Designed DC/DC converter has the performance of less than 5 % ripple and higher than 80 % efficiency. Chip area is 3.50 mm ${\times}$ 2.05 mm with standard 0.35 $\mu\textrm{m}$ CMOS technology.

• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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• pp.366-370
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• 2003

This paper introduces a new design and fabrication technology of 28 GHz low-cost up and down converter modules for digital microwave radios, The design of the converter module is based on unit circuit blocks, which are to be characterized using a special test fixture. Based on the cascade analysis of the module the 28 GHz up and down converter modules have been designed and implemented. The measured module performance agrees with the cascade analysis. New components such as a tapped edge-coupled filter and a new Ka-band waveguide-to-microstrip transition, which are less sensitive to fabrication tolerances, have been used in the module implementation.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 통신소사이어티 추계학술대회논문집
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• pp.273-276
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• 2003

In this paper, we designed and made up/down converter (UDC) for using W-CDMA digital pre-distortion system which is one of the efficiency enhancement techniques. UDC is required that frequency up(baseband to RF) and down(RF to baseband) of information signals. The focus of the design and PCB layout is to satisfy the linearity of the UDC. We tested that UDC was satisfied specification which is based on 3GPP base stations and repeaters. The ACLR results which are -51.84dBc(Up Converter) and -55.0dBc(Down Converter) at upper 5 MHz offset from center-frequency show that UDC satisfy the 3GPP specification with superior linearity data.

• Journal of Power Electronics
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• 제14권2호
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• pp.203-216
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• 2014

In the conventional dc-dc converter, a pair of additional diode and the adjacent passive component capacitor/inductor can be added to the circuit with an X-shape connection, which generates a family of new topologies. The novel circuits, also called diode-assisted dc-dc converter, enhance the voltage boost/buck capability and have a great potential for high step-up/step-down power conversions. This paper mainly investigates and compares conventional dc-dc converter and diode-assisted dc-dc converter in wide range power conversion from the aspects of silicon devices, passive components requirements, electro-magnetic interference (EMI) and efficiency. Then, a comprehensive comparison example of a high step-up power conversion system was carried out. The two kinds of boost dc-dc converters operate under the same operation conditions. Mathematical analysis and experiment results verify that diode-assisted dc-dc converters are very promising for simultaneous high efficiency and high step-up/step-down power conversion in distributed power supply systems.

• 전력전자학회논문지
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• 제19권2호
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• pp.157-163
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• 2014

This paper proposes a two-stage step-down buck and a tapped-inductor boost cascaded converter for high efficiency photovoltaic micro-inverter applications. The proposed inverter is a new structure to inject a rectified sinusoidal current into a low-frequency switching inverter for single-phase grid with unity power factor. To build a rectified-waveform of the output current. the converter employs both of a high efficiency step-up and a step-down converter in cascade. In step-down mode, tapped inductor(TI) boost converter stops and the buck converter operates alone. In boost mode, the TI converter operates with the halt of buck operation. The converter provides a rectified current to low frequency inverter, then the inverter converts the current into a unity power-factor sinusoidal waveform. By applying a TI, the converter can decrease the turn-on ratios of the main switch in TI boost converter even with an extreme step-up operation. The performance validation of the proposed design is confirmed by an experimental results of a 120W hardware prototype.

• 전기전자학회논문지
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• 제12권1호
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• pp.34-42
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• 2008

This paper proposes a new on-chip voltage down converter(VDC), which employs a new reference voltage generator(RVG). The converter adopts a temperature-independence reference voltage generator, and a voltage-up converter. The architecture of the proposed VDC has a high-precision, and it was verified based on a 0.25${\mu}m$ 1P5M standard CMOS technology. For 2.5V to 1.0V conversion, the RVG circuit has a good characteristics such as temperature dependency of only 0.2mV/$^{\circ}C$, and the voltage-up circuit has a good voltage deviation within ${\pm}$0.12% for ${\pm}$5% variation of supply voltage VDD. The output voltage is stabilized with ${\pm}$1mV for load current varying from 0 to 100mA.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2002년도 하계학술대회 논문집 D
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• pp.2589-2591
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• 2002

송수신기의 방식에는 직접변환 방식과 기저대역 신호와 LO(Local Oscillator)를 혼합하여 interpolation 기법을 사용하여 중간 주파수 단계까지 up conversion을 하고 두 번째 LO와 IF신호를 혼합하여 RF신호로 변환하여 송신하는 헤테로다인 방식이 존재한다. 본 논문에서는 이런 송수신기 방식 중에서 헤테로다인 방식을 적용하여 QPSK에서의 digital up /down converter를 Simulink 환경에서 설계 및 구현하였다. Up converter는 4배의 interpolation 필터와 4단짜리 cascaded integrate-comb(CIC)필터를 사용하여 입력데이터의 샘플 레이트를 클럭 레이트까지 증가시켰으며, numerically controlled oscillator (NCO)와 mixer를 사용하여 신호를 변조하였다. Down converter의 구조는 up converter와 동일하며 단지 up converter의 반대순서로 구성되어있다. 이런 모든 과정을 Simulink를 이용한 시뮬레이션과 스펙트럼 분석기를 사용하여 검증해 보았다.

• 전기전자학회논문지
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• 제16권4호
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• pp.335-342
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• 2012

본 논문에서는 고효율과 고역률을 위한 새로운 DCM-ZVS 스텝 업-다운 AC-DC 컨버터에 대해 연구된다. 제안한 DCM-ZVS 컨버터에 사용된 스위칭 소자들은 새로운 유사공진 회로에 의해 소프트 스위칭 기법으로 동작되고, 펄스폭변조(PWM) 방식에 의한 전류불연속모드(DCM)로 구동된다. 제안한 컨버터의 유사공진 회로는 스텝 업-다운 인덕터와 무손실 스너버 커패시터로 구성되고, 또한 DCM에 의해 제어회로 기법과 제어회로 구성이 간단한 장점이 주어진다. 입력 교류 전류파형은 일정 스위칭 주파수에 의한 교류 입력전압의 크기에 비례한 유사 정현파형으로 된다. 그 결과, 제안한 DCM-ZVS 컨버터는 낮은 스위칭 손실과 고효율을 얻을 수 있으며, 컨버터의 입력역률은 거의 단위역률로 된다. 해석적 결과의 타당성은 다양한 컴퓨터 시뮬레이션과 실험 결과를 통해 입증된다.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.234-237
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• 2008

This paper deals with a new single-phase Z-source matrix converter (SZMC) topology. Unlike other conventional configurations, the proposed SZMC is not only a step-up frequency converter but also a step-down frequency converter and a voltage boost capability. Thus, the proposed SZMC is also called a frequency step-up/down and voltage step-up converter. A safe-commutation strategy is used in SZMC as free-wheeling operation to eliminate voltage spikes on switches. The operating principles and experimental results of the proposed SZMC are presented.