• Steel and Composite Structures
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• v.24 no.6
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• pp.689-695
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• 2017

The constitutive relation is an important factor in analysis of confined concrete in composite structures. In order to propose a constitutive model for nonlinear analysis of confined concrete, lateral restraint mechanism of confined concrete is firstly analyze to study the generalities. As the foundation of the constitutive model, peak stress and peak strain is the first step in research. According to the generalities and the Twin Shear Unified Strength Theory, a novel unified equation for peak stress and peak strain are established. It is well coincident with experimental results. Based on the general constitutive relations and the unified equation for peak stress and peak strain, we propose a unified and convenient constitutive model for confined concrete with fewer material parameters. Two examples involved with steel tube confined concrete and hoop-confined concrete are considered. The proposed constitutive model coincides well with the experimental results. This constitutive model can also be extended for nonlinear analysis to other types of confined concrete.

• Journal of architectural history
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• v.23 no.5
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• pp.37-45
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• 2014

It was identified by the excavation that architecture remains were confirmed buddhist temple consist of ruins of main building of a temple, auditorium site, ruins of stone pagoda, embankment, pedestrian Facilities and drainage etc. in the Gwangmyeong-dong site. The site has been held temple arrangement with 1 main building of a temple, twin Pagodas from the Unified Silla period to Goryeo dynasty. The temple constructed after that was destroyed the architecture in the Unified Silla period. It seems that aristocrat or royalty power of within group of the nearby remains of city which was constructed in the Unified Silla period build and visit the temple. Considering there are excavations, it assumes that the temple had been constructed during the last days of the Unified Silla, was closed up during the mid-Goryeo Dynasty.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.33B no.2
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• pp.103-110
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• 1996

In this paper, we propose a unified systolic array for the computation of the 2D discrete cosine transform/discrete sine transform/discrete hartley transform (DCT/DST/DHT). The unified systeolic array for the 2D DCT/DST/DHT is a generalization of the unified systolic array for the 1D DCT/DST/DHT. In order to calculate the 2D transform, we compute 1D transforms along the row, transpose them, and obtain 1D transforms along the column. When we compare the proposed systolic array with the conventional method, our architecture exhibits a lot of advantages in terms of latency, throughput, and the number of PE's. The simulation results using very high speed integrated circuit hardware description language (VHDL), international standard language for hardware description, show the functional validity of the proposed architecture.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.540-543
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• 2013

This paper describes an implementation of a unified ALU on multi-core GPGPU based on SIMT architecture. Our unified ALU can operate conditional branch instructions, data movement instructions, integer arithmetic instructions and floating-point arithmetic instructions. Since multi-core GPGPU contains a lot of ALU for parallel processing of various types, the main point of this paper is to design the minimum size ALU by unifying similar processing of each operations on circit level. All instrunctions were tested by making a test program. And we compare this results with results of CPU operations to verify our ALU. Our unified ALU's gate size is approximately 20,000 and the maximum operation frequency is 430MHz.

• IEMEK Journal of Embedded Systems and Applications
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• v.11 no.2
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• pp.57-65
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• 2016

In this paper, we propose a system for efficient use of shared memory between CPU and GPU. The system, called Fusion Architecture, assures consistency of the shared memory and minimizes cache misses that frequently occurs on Heterogeneous System Architecture or Unified Virtual Memory based systems. It also maximizes the performance for memory intensive jobs by efficient allocation of GPU cores. To test between architectures on various scenarios, we introduce the Fusion Architecture Analyzer, which compares OpenMP, OpenCL, CUDA, and the proposed architecture in terms of memory overhead and process time. As a result, Proposed fusion architectures show that the Fusion Architecture runs benchmarks 55% faster and reduces memory overheads by 220% in average.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.13 no.1
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• pp.134-144
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• 2009

The Ubiquitous/Unified Communication Platform supports various multimedia communication tools such as VoIP, Email, Unified Messaging, Instant Messaging, Web Conferencing, Audio/Video Communication etc. In this paper we introduced the main functions and architecture of the Unified Communication Platform and we researched on the function analysis and design of the VoIP System that supports PC-to-PBX/PSTN Phone and PBX/PSTN Phone-to-PC communications through the connectivity and interoperation with PSTN.

• ETRI Journal
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• v.29 no.6
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• pp.820-822
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• 2007

ARIA and the Advanced Encryption Standard (AES) are next generation standard block cipher algorithms of Korea and the US, respectively. This letter presents an area-efficient unified hardware architecture of ARIA and AES. Both algorithms have 128-bit substitution permutation network (SPN) structures, and their substitution and permutation layers could be efficiently merged. Therefore, we propose a 128-bit processor architecture with resource sharing, which is capable of processing ARIA and AES. This is the first architecture which supports both algorithms. Furthermore, it requires only 19,056 logic gates and encrypts data at 720 Mbps and 1,047 Mbps for ARIA and AES, respectively.

• The KIPS Transactions:PartB
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• v.18B no.4
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• pp.173-180
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• 2011

This paper shows an approach for real-time object segmentation on GPU (Graphics Processing Unit) using CUDA (Compute Unified Device Architecture). Recently, many applications that is monitoring system, motion analysis, object tracking or etc require real-time processing. It is not suitable for object segmentation to procedure real-time in CPU. NVIDIA provide CUDA platform for Parallel Processing for General Computation to upgrade limit of Hardware Graphic. In this paper, we use adaptive Gaussian Mixture Background Modeling in the step of object extraction and CCL(Connected Component Labeling) for classification. The speed of GPU and CPU is compared and evaluated with implementation in Core2 Quad processor with 2.4GHz.The GPU version achieved a speedup of 3x-4x over the CPU version.

• Journal of The Korean Digital Architecture Interior Association
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• v.11 no.2
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• pp.21-30
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• 2011

Urban scape of Gyeongju is overlapped by periods. So, a study of each Periodical urban scape is required to understanding the present urban scape. All it requires study is on account of different a characteristic and the meaning of the scape. Especially, unified Silla period was most flourished in all time, has Abundant image of urban scape, heavily influences present urban scape. The research was proceeded through the classifying the concept of Urban form and the basic ideology and adopting the representative landscape at that time with the literatures and maps, on Unified Silla Period. And then tried to find out the identity of landscape with the link between the concepts of the representative landscape and that of Urban form in chronological order. The identity of historical landscape in Gyeongju on Unified Silla Period from the result of research has been influenced on by the connection with natural environment, urban form revealed by grid, space organized by vigorously heading up the inside, and Buddhistic ideology and esthetics.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2017.10a
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• pp.584-586
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• 2017

In this paper we provide a unified crypto core that integrates lightweight symmetric cryptography and authentication. The crypto core implements a unified 128 bit key architecture of PRESENT encryption algorithm and a new lightweight encryption algorithm. The crypto core also consist of an authentication unit which neglects the use of hashing algorithms. Four algorithms are used for authentication which come from the Hopper-Blum (HB) and Hopper-Blum-Munilla-Penado (HB-MP) family of lightweight authentication algorithms: HB, HB+, HB-MP and HB-MP+. A unified architecture of these algorithms is implemented in this paper. The unified cryptosystem is designed using Verilog HDL, simulated with Modelsim SE and synthesized with Xilinx Design Suite 14.3. The crypto core synthesized to 1130 slices at 189Mhz frequency on Spartan6 FPGA device.