• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.288-288
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• 2011

최근 Charge Trap Flash (CTF) Non-Volatile Memory (NVM) 소자가 30 nm node 이하로 보고 되면서, 고집적화 플래시 메모리 소자로 각광 받고 있다. 기존의 CTF NVM 소자의 tunnel layer로 쓰이는 SiO2는 성장의 용이성과 Si 기판과의 계면특성, 낮은 누설전류와 같은 장점을 지니고 있다. 하지만 단일층의 SiO2를 tunnel layer로 사용하는 기존의 Non-Valatile Memory (NVM)는 두께가 5 nm 이하에서 direct tunneling과 Stress Induced Leakage Current (SILC) 등의 효과로 인해 게이트 누설 전류가 증가하여 메모리 보존특성의 감소와 같은 신뢰성 저하에 문제점을 지니고 있다. 이를 극복하기 위한 방안으로, 최근 CTF NVM 소자의 Tunnel Barrier Engineered (TBE) 기술이 많이 접목되고 있는 상황이다. TBE 기술은 SiO2 단일층 대신에 서로 다른 유전율을 가지는 절연막을 적층시킴으로서 전계에 대한 민감도를 높여 메모리 소자의 쓰기/지우기 동작 특성과 보존특성을 동시에 개선하는 방법이다. 또한 터널링 절연막으로 유전률이 큰 High-K 물질을 이용하면 물리적인 두께를 증가시킴으로서 누설 전류를 줄이고, 단위 면적당 gate capacitance값을 늘릴 수 있어 메모리 소자의 동작 특성을 개선할 수 있다. 본 연구에서는 CTF NVM 소자의 trap layer로 쓰이는 HfO2의 두께를 5 nm, blocking layer의 역할을 하는 Al2O3의 두께를 12 nm로 하고, tunnel layer로 Si3N4막 위에 유전율과 Energy BandGap이 유사한 HfAlO와 ZrO2를 적층하여 Program/Erase Speed, Retention, Endurance를 측정을 통해 메모리 소자로서의 특성을 비교 분석하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.53-53
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• 2011

This paper describes results for surface and bulk characterization of the most promising thin film solar cell material for high performance devices, (Ag,Cu) (In,Ga) Se2 (ACIGS). This material in particular exhibits a range of exotic behaviors. The surface and general materials science of the material also has direct implications for the operation of solar cells based upon it. Some of the techniques and results described will include scanning probe (AFM, STM, KPFM) measurements of epitaxial films of different surface orientations, photoelectron spectroscopy and inverse photoemission, Auger electron spectroscopy, and more. Bulk measurements are included as support for the surface measurements such as cathodoluminescence imaging around grain boundaries and showing surface recombination effects, and transmission electron microscopy to verify the surface growth behaviors to be equilibrium rather than kinetic phenomena. The results show that the polar close packed surface of CIGS is the lowest energy surface by far. This surface is expected to be reconstructed to eliminate the surface charge. However, the AgInSe2 compound has yielded excellent atomic-resolution images of the surface with no evidence of surface reconstruction. Similar imaging of CuInSe2 has proven more difficult and no atomic resolution images have been obtained, although current imaging tunneling spectroscopy images show electronic structure variations on the atomic scale. A discussion of the reasons why this may be the case is given. The surface composition and grain boundary compositions match the bulk chemistry exactly in as-grow films. However, the deposition of the heterojunction forming the device alters this chemistry, leading to a strongly n-type surface. This also directly explains unpinning of the Fermi level and the operation of the resulting devices when heterojunctions are formed with the CIGS. These results are linked to device performance through simulation of the characteristic operating behaviors of the cells using models developed in my laboratory.

• Journal of Sensor Science and Technology
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• v.7 no.2
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• pp.97-102
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• 1998

Organic thin film EL devices using PPV(poly (p-phenylenevinylene)) as emitter were fabricated on various conditions and structures, their electro-optical properties were estimated. Fabricated EL devices had structures of single layer(ITO(indium tin oxide)/PPV/Mg), double layer(ITO/PVK(poly(N-vinylcarbazole))/PPV/Mg and ITO/PPV/Polymer matrix + PBD/Mg) and three layer (ITO/PVK/PPV/PS(polystyrene)+PBD(butyl-2-(4-bipheny])-5-(4-tert-butylphenyl-1,3,4-oxadiazole))/Mg), their electro-optical characteristics were compared with each other. In structure of double layer (ITO/PPV /Polymer matrix + PBD/Mg), the used polymer-matrices were PMMA(poly(methyl methacrylate), PC(polycarbonate), PS and MCH(side chain liquid crystalline homopolymer). When PS as a hole transport layer was used, the luminance characteristics on concentration of PBD was obtained. In results, current-voltage-luminance curves of fabricated devices had characteristics of tunneling effect and the device showed a stable light emitting.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.11a
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• pp.35-38
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• 2002

In this paper, the characteristics of channel hot electron (CHE) injection for the write operation in a NOR-type SONOS flash memory with common source line were investigated. The thicknesses of he tunnel oxide, the memory nitride， and the blocking oxide layers for the gate insulator of the fabricated SONOS devices were $34{\AA}$, $73{\AA}$, and $34{\AA}$, respectively. The SONOS devices compared to floating gate devices have many advantages, which are a simpler cell structure, compatibility with conventional logic CMOS process and a superior scalability. For these reasons, the introduction of SONOS device has stimulated. In the conventional SONOS devices, Modified Folwer-Nordheim (MFN) tunneling and CHE injection for writing require high voltages, which are typically in the range of 9 V to 15 V. However CHE injection in our devices was achieved with the single power supply of 5 V. To demonstrate CHE injection, substrate current (Isub) and one-shot programming curve were investigated. The memory window of about 3.2 V and the write speed of $100{\mu}s$ were obtained. Also, the disturbance and drain turn-on leakage during CHE injection were not affected in the SONOS array. These results show that CHE injection can be achieved with a low voltage and single power supply, and applied for the high speed program of the SONOS memory devices.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.6B
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• pp.420-429
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• 2008

Currently, IEEE 802.11 Network could not support optimized tunneling scheme and buffering scheme based on movement detection to reduce multimedia data packet loss when an MN move from current subnet to new subnet during handover. It is because IEEE 802.11 did not transfer information of movement detection to AP. In this paper, we proposed new fast handover scheme by using advanced access point and optimized snoop protocol for network based Proxy Mobile IPv6 in IEEE 802.11 Networks. During handover, the proposed scheme reduces both the multimedia data packet loss rate and the packet reordering problems without changing MN's mobility stack in IEEE 802.11 Networks.

• Journal of Korean Tunnelling and Underground Space Association
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• v.19 no.2
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• pp.109-120
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• 2017

Groundwater seepage into a tunnel is one of the main causes triggering tunnel collapse and the consequent ground subsidence. Thus, it is important to estimate adequately the groundwater inflow rate and porewater pressure change during tunneling with time elapse. In current practice, Goodman's analytical solution (or image tunnel method) assuming homogeneous ground condition around a tunnel is commonly used for estimating groundwater inflow rate. However, the generally-used analytical solution for estimating groundwater inflow rate does not consider groundwater level drawdown and permeability change with depth, and the inflow rate can be overestimated in design phase. In this study, parametric study was performed in order to investigate the effect of groundwater level drawdown and permeability reduction with depth, and transient flow analysis was carried out for studying the inflow rate change as well as groundwater level and porewater pressure change around a tunnel with time elapse.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.8
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• pp.1-8
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• 2004

Experimental results are presented for gate oxide degradation, such as SILC and soft breakdown, and its effect on device parameters under negative and positive bias stress conditions using n-MOSFET's with 3 nm gate oxide. The degradation mechanisms are highly dependent on stress conditions. For negative gate voltage, both interface and oxide bulk traps are found to dominate the reliability of gate oxide. However, for positive gate voltage, the degradation becomes dominated mainly by interface trap. It was also found the trap generation in the gate oxide film is related to the breakage of Si-H bonds through the deuterium anneal and additional hydrogen anneal experiments. Statistical parameter variations as well as the “OFF” leakage current depend on both electron- and hole-trapping. Our results therefore show that Si or O bond breakage by tunneling electron and hole can be another origin of the investigated gate oxide degradation. This plausible physical explanation is based on both Anode-Hole Injection and Hydrogen-Released model.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.4
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• pp.373-379
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• 2002

We investigated the evolution of magnetoresistance and magnetic property of tunneling magnetoresistive(TMR) device with microstructure and plasma oxidation time. TMR devices have potential applications for non volatile MRAM and high density HDD reading head. We prepared the tunnel magnetoresistance(TMR) devices of Ta($50{\AA}$)/NiFe($50{\AA}$)/IrMn($150{\AA}$)/CoFe($50{\AA}$)/Al($13{\AA}$)-O/CoFe($40{\AA}$)/FiFe($400{\AA}$)/Ta(($50{\AA}$) structure which have $100{\times}100\mu\textrm{m}^2$ junction area on $2.5{\times}2.5\textrm{cm}^2$ Si/$SiO_2$(($1000{\AA}$) substrates by an inductively coupled plasma(ICP) magnetron sputter. We fabricated the insulating layer using an ICP plasma oxidation method by with various oxidation time from 30 sec to 360 sec, and measured resistances and magnetoresistance(MR) ratios of TMR devices. We found that the oxidized sample for oxidation time of 80 sec showed the highest MR radio of 30.31 %, while the calculated value regarding inhomogeneous current effect indicated 25.18 %. We used transmission electron microscope(TEM) to investigate microstructural evolution of insulating layer. Comparing the cross-sectional TEM images at oxidation time of 150 sec and 360 sec, we found that the thickness and thickness variation of 360 sec-oxidized insulating layer became 30% and 40% larger than those of 150 sec-oxidized layer, repectively. Therefore, our results imply that increase of thickness variation with oxidation time may be one of the major treasons of the MR decrease.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.1844-1846
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• 2005

The characteristic of negative differential resistance(NDR) is decreased current when the applied voltage is increased. The NDR is potentially very useful in molecular electronics device schemes. Here, we investigated the NDR property of self-assembled 4,4- Di(ethynylphenyl)-2'-nitro-1-(thioacetyl)benzene, which has been well known as a conducting molecule. Self-assembly monolayers(SAMs) were prepared on Au(111), which had been thermally deposited onto pre-treatment$(H_2SO_4:H_2O_2=3:1)$ Si. The Au substrate was exposed to a 1mM/l solution of 1-dodecanethiol in ethanol for 24 hours to form a monolayer. After thorough rinsing the sample, it was exposed to a $0.1{\mu}M/l$ solution of 4,4-Di(ethynylphenyl)-2'-nitro-1-(thioacetyl)benzene in dimethylformamide(DMF) for 30 min and kept in the dark during immersion to avoid photo-oxidation. After the assembly, the samples were removed from the solutions, rinsed thoroughly with methanol, acetone, and $CH_2Cl_2$, and finally blown dry with $N_2$. Under these conditions, we measured electrical properties of self-assembly monolayers(SAMs) using ultra high vacuum scanning tunneling microscopy(UHV-STM). The applied voltages were from -2V to +2V with 299K temperature. The vacuum condition is $6{\times}10^{-8}$ Torr. As a result, we found the NDR voltage of the nitro-benzene is $-1.61{\pm}0.26$ V(negative region) and $1.84{\pm}0.33$ (positive region), respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.8
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• pp.1465-1470
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• 2017

In conventional MOSFETs, the silicon thickness is always larger than inversion layer, so that the drain induced barrier lowering (DIBL) is expressed as a function of oxide thickness and channel length regardless of silicon thickness. However, since the silicon thickness is fully depleted in the sub-10 nm low doped double gate (DG) MOSFET, the conventional SPICE model for DIBL is no longer available. Therefore, we propose a novel DIBL SPICE model for DGMOSFETs. In order to analyze this, a thermionic emission and the tunneling current was obtained by the potential and WKB approximation. As a result, it was found that the DIBL was proportional to the sum of the top and bottom oxide thicknesses and the square of the silicon thickness, and inversely proportional to the third power of the channel length. Particularly, static feedback coefficient of SPICE parameter can be used between 1 and 2 as a reasonable parameter.