• 대한전기학회논문지:전력기술부문A
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• 제49권7호
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• pp.359-364
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• 2000

This paper is introducing a newly developed spark-gap switch with dual trigger system, into which the current from the voltage source is injected along with the test sequence during the synthetic testing of high voltage circuit-breaker. The currently-used spark gap switch is narrow in operating range due to the use of the method of triggering energy being injected by single way. As a result, the frequent happening of misoperation has greatly reduced the test quality and test efficiency and has required the cost of maintenance excessively. In this study, accordingly, in order to basically remove these problems, another triggering system is installed to the opposite direction on the existing triggering system; attaching the same time and the same rising time of pulse wave as on the existing system, so that at a comparatively trigger gap distance from the main electrode(the gap can be operated at 60% of self-break voltage, while at 80% in the current system), the main electrode has been enabled to be closed by the development of spark gap switch with dual trigger system.

• 한국정보전자통신기술학회논문지
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• 제12권2호
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• pp.150-154
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• 2019

In the design of semiconductor integrated circuits, ESD is one of the important issues related to product quality improvement and reliability. In particular, as the process progresses and the thickness of the gate oxide film decreases, ESD is recognized as an important problem of integrated circuit design. Many ESD protection circuits have been studied to solve such ESD problems. In addition, the proposed device can modify the existing SCR structure without adding external circuit to effectively protect the gate oxide of the internal circuit by low trigger voltage, and prevent the undesired latch-up phenomenon in the steady state with high holding voltage. In this paper, SCR-based novel ESD(Electro-Static Discharge) device with the high holding voltage has been proposed. The proposed device has the lower triggering voltage without an external trigger circuitry and the high holding voltage to prevent latch-up phenomenon during the normal condition. Using TCAD simulation results, not only the design factors that influence the holding voltage, but also comparison of conventional ESD protection device(ggNMOS, SCR), are explained. The proposed device was fabricated using 0.35um BCD process and was measured electrical characteristic and robustness. In the result, the proposed device has triggering voltage of 13.1V and holding voltage of 11.4V and HBM 5kV, MM 250V ESD robustness.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.589-590
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• 2006

A novel Triple-Well P-type Triggered Silicon Controlled Rectifier (TWPTSCR) for on-chip ESD protection implemented with a triple-well CMOS technology is presented. Unlike conventional SCR devices, the proposed TWPTSCR offers a reduced triggering voltage level as well as the enhanced ESD performance of the SCR devices. From the experimental results, the TWPTSCR with a device width of 20um has the triggering voltage of 1.1V.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.587-588
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• 2006

This paper presents the new structural zener triggered silicon-controlled rectifier (ZTSCR) electrostatic discharge (ESD) protection circuit. The proposed ESD protection circuit has lower triggering voltage than conventional circuits. The proposed ZTSCR has the triggering voltage of 4V. In the ESD event, this proposed novel ZTSCR ESD protection device could trigger quickly and provide an effective discharging path.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 추계학술대회 논문집 전기물성,응용부문
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• pp.205-207
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• 2001

This study is characteristic analysis to optimize triggering of a high-power trigatron by FEM which is used to analyse electric field distribution in the trigatron. Triggering characteristics of a trigatron depends on arrangement of voltage polarity applied on electrodes and configuration of electrodes. This study is the preliminary stage for an experiment and make it possible to experiment effectively by finding optimal triggering characteristics though 3-dimensional node-based FEM which can practically model the complex structured electrode system.

• 전기학회논문지
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• 제59권4호
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• pp.762-767
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• 2010

This paper describes characteristic of a light triggered thyristor investigated by experiment to adopt it into a main switch of a pulsed power unit. Triggering principle of the light triggered thyristor are referred with its structure and equivalent circuit. Operational principle and simulation result of a capacitive pulsed power circuit are explained. A variety of triggering conditions of triggering circuit and characteristics on turn-on, turn-off, voltage dividing in series operation, overvoltage protection function of the light triggered thyristor are investigated by experiments. Experimental result of 40 kJ pulsed power unit using the light triggered thyristor is presented.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1989년도 추계학술대회 논문집 학회본부
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• pp.142-144
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• 1989

Triggering characteristics of a trigatron spark gap have been studied by measuring self-emission UV light. By combining the measurement of the UV light with that of the trigger gap voltage and the lain discharge current, we distinguished clearly the differences between the trigatron operations in which the lain discharge occurs after the trigger discharge in the case of sale polarity between the trigger pin and the lain electrode at the opposite side, and the lain gap breakdown takes place before the formation of the trigger spark in the case of different polarity. We show the observation of UV radiation with the other electromagnetic measurements is a simple and reliable scheme to investigate the triggering properties of the trigatron spark gaps.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.1
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• pp.300-303
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• 2003

The design rule for 8.5kV LTT was discussed here. An inherent integrated breakover diode (BOD) for self -protection function and multi-amplified gate (AG) for improved di/dt capability of LTT was introduced in principle. The trade-off between light triggering input source and high dV/dt limitation has been treated via narrow grooved P-base for gate design. Key process technology for LTT was given, too.

• 한국전기전자재료학회논문지
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• 제26권2호
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• pp.134-139
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• 2013

When the accident occurred in power distribution system, it needs to control efficiently the fault current according to the fault angle and location. The flux-lock type superconducting fault current limiters (SFCL) can quickly limit when the short circuit accidents occurred and be made the resistance after the fault current. The flux-lock type SFCL has a single triggering element, detects and limits the fault current at the same time regardless of the size of the fault current. However, it has a disadvantage that broken the superconductor element. If the flux-lock type SFCL has separated structure of the triggering element and the limiting element, when large fault current occurs, it can reduce the burden of power and control fault current to adjust impedance. In this paper, this system is composed by triggering element and limiting element to analyze operation of limiting current. When the fault current occurs, we analyzed the limiting and operating current characteristics of the two triggering current level, and the compensation characteristics of bus-voltage sag according to the fault angle and location.

• KIEE International Transactions on Electrophysics and Applications
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• 제5C권4호
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• pp.145-151
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• 2005

The synthetic breaking test method was developed to evaluate the breaking performance of ultra high-voltage circuit breaker and made up of two independent circuits; current source circuit and voltage source circuit. In application of this test method, it is necessary to extend the arc of the test breaker. So, the new re-ignition system using VTGS (Vacuum Triggered Gap-Switch) was constructed to improve the efficiency and reliability of this test. In this re-ignition system, VTGS operates in high vacuum state of $5{\time}10^{17}$torr and control system consists of the triggering device and the air M-G (Motor-Generator). This re-ignition system showed the operating characteristics, such as delay time ($t_d$) and jitter time ($t_j$ not exceeding 5us and 1us respectively, and had the operating voltage of $25\~150kVdc$ at the gap distance of 24mm.