• Journal of IKEEE
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• v.25 no.2
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• pp.350-355
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• 2021

IGBT is a power semiconductor device that contains both MOSFET and BJT structures, and it has fast switching speed of MOSFET, high breakdown voltage and high current of BJT characteristics. IGBT is a device that targets the requirements of an ideal power semiconductor device with high breakdown voltage, low V_CE-SAT, fast switching speed and high reliability. In this paper, we analyzed Gate oxide thickness, Trench Gate Width, and P+Emitter width, which are the top process parameters of 1,200V Trench Gate Field Stop IGBT, and suggested the optimized top process parameters. Using the Synopsys T-CAD Simulator, we designed IGBT devices with electrical characteristics that has breakdown voltage of 1,470 V, V_CE-SAT 2.17 V, Eon 0.361 mJ and Eoff 1.152 mJ.

• Transactions on Electrical and Electronic Materials
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• v.2 no.3
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• pp.33-37
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• 2001

A vertical trench electrode type EST has been proposed in this paper. The proposed device considerably improves snapback which leads to a lot of problems of device applications. In this paper, the vertical dual gate Emitter Switched Thyristor (EST) with trench electrode has been proposed for improving snab-back effect. It is observed that the forward blocking voltage of the proposed device is 745V. The conventional EST of the same size were no more than 633V. Because the proposed device was constructed of trench-type electrodes, the electric field moved toward trench-oxide layer, and the punch through breakdown of the proposed EST is occurred at latest.

• Transactions on Electrical and Electronic Materials
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• v.4 no.2
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• pp.15-19
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• 2003

In this paper, the new dual trench gate Emitter Switched Thyristor (DTG-EST) is proposed for improving snap-back effect which leads to a lot of serious problems of device applications. Also the parasitic thyristor that is inherent in the conventional EST is completely eliminated in this structure, allowing higher maximum controllable current densities for ESTs. The conventional EST exhibits snap-back with the anode voltage and current density 2.73V and 35A/$\textrm{cm}^2$, respectively. But the proposed DTG-EST exhibits snap-back with the anode voltage and current density 0.96V and 100A/$\textrm{cm}^2$, respectively.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.7
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• pp.358-363
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• 2004

A new 600 V dual gate transistor employing thyristor action, which incorporates floating PN junction and trench gate IGBT, is proposed to improve the forward current-voltage characteristics and the short circuit ruggedness. Our two-dimensional numerical simulation shows that the proposed device exhibits low forward voltage drop and eliminates the snapback phenomena compared with conventional trench gate IGBT and EST The proposed device achieves high current saturation characteristics by separating floating N+ emitter and cathode. The proposed device achieves low saturation current value compared with conventional devices, and the short-circuit ruggedness is improved. The proposed device may be suitable for the use of high voltage switching applications.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.2
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• pp.249-255
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• 1996

A self-aligned latch-up suppressed IGBT has been proposed and the process method and the device characteristics of the IGBT have been verified by numerical simulation. As the source is laterally diffused through the sidewall of the trench in the middle of the body, the size of the source is small and the doping concentration of the source is lower than that of the p++ body and the emitter efficiency of the parasitic npn transistor is low so that latch-up may be suppressed. No additional mask steps for p++ region, source, and source contact are required so that small sized body can be obtained Latch-u current density higher than 10000 A/cm$^{2}$ have been achieved by adjusting the process conditions.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.486-489
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• 2007

Carbon nanotube (CNT) cathodes having a trench structure similar to the structure of the gated triodetype cathode were successfully fabricated by a screenprinting method with multi-walled carbon nanotubes. We observed that a liquid method not only readily removes the organic residues on the CNT films, but also satisfactorily protrudes the CNTs out of the electrode surface. The CNT cathodes prepared by the liquid method showed a turned-on field of $1.4\;V/{\mu}m$. The emission current density of them was about $3.1\;mA/cm^2$ at the electric field of $3\; V/{\mu}m$. The liquid method appears to be a promising surface treatment of CNT cathode for gated triode-type FEDs applications.

• Korean Journal of Materials Research
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• v.13 no.5
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• pp.333-337
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• 2003

We report a new fabrication process for carbon nanotube field emitters with high performance. The key of the fabrication process is trim-and-leveling the carbon nanotubes grown in trench structures by employing a planarization process, which leads to a uniform distance from the carbon nanotube tip to the electrode. In order to enable this processing, spin-on-glass liquid is applied over the CNTs grown in trench to have them stubborn adhesion among themselves as well as to the substrate. Thus fabricated emitters reveal an extremely stable emission and aging characteristics with a large current density of 40 ㎃/$\textrm{cm}^2$ at 4.5 V/$\mu\textrm{m}$. The field enhancement factor calculated from the F-N plot is $1.83${\times}$10^{5}$ $cm^{－1}$ , which is a very high value and indicates a superior quality of the emitter originating from the nature of open-tip and high stability of the carbon nanotubes obtained new process.

• Korean Journal of Materials Research
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• v.14 no.8
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• pp.542-546
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• 2004

We report a new fabrication process for high performance triode type CNT field emitters and their superior electrical properties. The CNT-based triode-type field emitter structure was fabricated by the conventional semiconductor processes. The keys of the fabrication process are spin-on-glass coating and trim-and-leveling of the carbon nanotubes grown in trench structures by employing a chemical mechanical polishing process. They lead to strong adhesion and a uniform distance from the carbon nanotube tips to the electrode. The measured emission property of the arrays showed a remarkably uniform and high current density. The gate leakage current could be remarkably reduced by coating of thin $SiO_{2}$ insulating layer over the gate metal. The field enhancement factor(${\beta}$) and emission area(${\alpha}$) were calculated from the F-N plot. This process can be applicable to fabrication of high power CNT vacuum transistors with good electrical performance.

• Korean Journal of Materials Research
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• v.17 no.3
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• pp.173-178
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• 2007

Carbon nanotube cathodes(CNT cathodes) with a trench structure similar to gated structure of triode-type cathode were fabricated by a screen printing method using multi-walled carbon nanotubes. The effects of surface treatments on CNT cathodes were investigated for high efficiency field emission displays(FEDs). A liquid method easily removed the organic residue and protruded the CNTs. Field emission properties were measured by using a diode-type mode. The liquid method produced a turn-on field of $1.4V/{\mu}m$. The emission current density was measured about $3.1mA/cm^{2}$ at the electric field of $3V/{\mu}m$. The liquid method showed a high potential applicable to the surface treatment for triode-type FEDs.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.172-175
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• 2003

새로운 전력 반도체 소자로 주목받고 있는 MOS 구동 사이리스터 중 대 전력용으로 사용되는 EST는 높은 전류 밀도에서 게이트에 의한 전류 조절이 가능할 뿐만 아니라 다른 MOS 구동 사이리스터 소자와는 달리 전류 포화 특성을 지녀 차세대 전력 반도체로 각광 받고 있는 소자이다. 하지만 소자의 동작 시에 스냅-백 특성을 지녀 전력의 손실을 유발할 뿐만 아니라 오동작을 일으킬 가능성이 있다. 따라서 본 논문에서는 기존의 EST에서 스냅-백 특성의 제거와 저지 전압의 향상을 위해 트랜치 전극을 가지는 새로운 구조를 제안하고 게이트 전극과 캐소드 전극의 트랜치 화에 따른 특성 변화 양상을 살펴보기 위해 게이트 전극만 트랜치로 구성한 경우와 캐소드 전극만 트랜치로 구성한 경우를 시뮬레이션을 통해 해석하였다. 그 결과 기존의 EST에서 게이트 전극만을 트랜치 형태로 바꾼 경우에는 스냅-백 특성이 1.1 V의 애노드 전압과 91 A/cm2의 전류 밀도에서 발생하고 순방향 저지 모드 시의 저지 전압은 800 V로 기존의 257에 비해 월등한 전기적 특성 향상을 가져왔다. 그러나 기존의 EST에서 캐소드 전극만을 트랜치 형태로 바꾼 경우에는 스냅-백 특성이 1.72 V의 애노드 전압과 25 A/cm2의 전류 밀도에서 발생하고 순방향 저지 모드 시의 저지 전압은 613 V로 스냅-백 특성은 향상되었으나 저지 전압은 기존의 EST 보다 감소하였다. 결국 기존의 EST에서 게이트 전극만을 트랜치 전극 형태로 구성한 경우에 가장 탁월한 전기적 특성을 갖는 것으로 나타났다.