• Proceedings of the IEEK Conference
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• 2000.11b
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• pp.13-16
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• 2000

A quantum-wire field effect transistor(QW-FET) using asymmetric double InGaAs channel and Si-delta doped barrier has been fabricated. It exhibited good modulation and saturation characteristic in the range of ${\mu}\textrm{A}$ current level. For estimated channel width of 150nm QW-FET, maximum transconductance was about 400 mS/mm which is higher than a conventional heterostructure FET(HFET) with the same epi-structure.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.749-752
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• 1999

A new interface circuit for variable resistive sensors is proposed. The interface circuit compose of only two strain gages, a voltage-to-current converter, and current mirror with two outputs. A new dual slope A/D converter based on linear operational transconductance amplifier for the testing of prototype interface circuit is also described. The theory of operation is presented and experimental results are used to verify the theoretical predictions. The results show close agreement between predicted behaviour and experimental performance.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.967-970
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• 1999

A novel linear transconductor for low-voltage low-power signal processing is proposed. The transconductor consists of a pnp differential-pair and a npn differential-pair which are biased by local negative feedback. The simulation results show that the transcondcutor with transconductance of 50 $mutextrm{s}$ has a linearity error of 0.05% and the power dissipation is 2.44 ㎽ over an input linear range from -2V to +2V at supply voltage $\pm$3V.

• ETRI Journal
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• v.11 no.4
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• pp.98-104
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• 1989

Closed form solution of nonlinear 2-DEG concentration formula is proposed. This allows us to model continuous 2-DEG charge concentration as the function of gate voltage covering subthreshold region of the I-V curves. Comparisons of the Ids-Vgs characteristics and transconductance with the measured data were performed to show the accuracy of the proposed model. This way we have completely closed form I-V characteristics in subthreshold, triode and saturation region incorporating accurate charge control mechanism for HEMTs.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.3
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• pp.478-485
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• 1987

Optimization of the sub-micron N-channel MOSFET with the LDD(Lightly Doped Drain)structure has been investigated. LDD devices with various length of n-region, n-dose and n-implantation species were fabricated for this purpose. It will be shown that LDD devices have lower substrate current by an order of magnitude and higher breakdown voltage than the conventional devices with comparable channel length. Optimized LDD structure has been found when the sidewall thickness is 2500\ulcorner and n-region is phosphorus implantd with the dose of 1.0E13/cm\ulcorner It has been found that transconductance degradation is less than 20%.

• 한국정보디스플레이학회:학술대회논문집
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• 2009.10a
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• pp.307-309
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• 2009

We have fabricated vertical-type organic transistors (static induction transistors; SITs) with built-in nano-triode arrays formed in parallel by a colloidal-lithography technique. Using this technique, we could fabricate a microstructure in a lateral direction within a large-scale organic device without relying on photolithography. The organic transistor showed low operating voltages, high current output, and large transconductance.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1999.05a
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• pp.485-488
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• 1999

In this paper, the effects of back-gate bias on n-channel SOI MOSFETs has been systematically investigated. Back-gate surface is accumulated when negative bias is applied. It is found that the driving current ability of SOI MOSFETs is reduced because the threshold voltage and subthreshold slope are increased and transconductance is decreased due to the hole accumulation in Si body.

• Proceedings of the IEEK Conference
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• 2001.06e
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• pp.185-188
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• 2001

This paper proposes an error amplifier circuit using OTA(Operational Transconductance Amplifier) which is the main constituent element in pulse width modulation circuit. The proposed OTA error amplifier circuit is featured by simple circuit configuration, excellent high frequency characteristics and bias current controlled output. Through the experiment of pulse width modulation circuit, the validity of the operation of the OTA error amplifier circuit is verified.

• Proceedings of the IEEK Conference
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• 2000.07b
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• pp.933-936
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• 2000

N-channel poly-Si TFT, processed by Solid Phase Crystalline(SPC) on a glass substrate, has been investigated by measuring its electrical properties before and after stressing. It is observed that the threshold voltage shift due to electrical stress varies with various stress conditions. Threshold voltages measured in 1.5um and 3um poly-Si TFT’s are 3.3V, 37V respectively. With the threshold voltage shift, the degradation of transconductance and subthreshold swing is also observed.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.30A no.6
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• pp.8-13
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• 1993

A systematic synthesis process is presented for the simulation of current-controlled grounded inductors. The process is used to obtain three circuits which are believed to be novel. One of the circuits has been implemented using linear operational transconductance amplifiers (OTA's). Computer simulation rusults are used to verify theoretical predictions. The results show close agreement between predicted behaviour and experimental performance.