Study on the Optimization of LDD MOSFET

LDD MOSFET의 최적화에 관한 연구

Optimization of the sub-micron N-channel MOSFET with the LDD(Lightly Doped Drain)structure has been investigated. LDD devices with various length of n-region, n-dose and n-implantation species were fabricated for this purpose. It will be shown that LDD devices have lower substrate current by an order of magnitude and higher breakdown voltage than the conventional devices with comparable channel length. Optimized LDD structure has been found when the sidewall thickness is 2500\ulcorner and n-region is phosphorus implantd with the dose of 1.0E13/cm\ulcorner It has been found that transconductance degradation is less than 20%.