• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.12
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• pp.57-63
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• 2016

This paper describes implementation of the RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4g SUN sensor node transceiver modules. Design of the each module like VCO, prescaler, 1/N divider, ${\Delta}-{\Sigma}$ modulator, and common circuits of the PLL has been optimized to obtain high speed and low noise performance. Especially, the VCO has been designed with NP core structure and 13 steps cap-bank to get high speed, low noise, and wide band tuning range. The output frequencies of the implemented synthesizer is 1483MHz~2017MHz, the phase noise of the synthesizer is -98.63dBc/Hz at 100KHz offset and -122.05dBc/Hz at 1MHz offset.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.5
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• pp.49-54
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• 2009

This paper describes implementation of the 1.9GHz RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma }-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get good performance of speed, power consumption, and wide tuning range, N-P MOS core structure has been used in design of the VCO. The chip area including pads for testing is $1.2{\times}0.7mm^2$, and the chip area only core for IP in SoC is $1.1{\times}0.4mm^2$. The test results show that there is no special spurs except -63.06dB of the 6MHz reference spurs in the PLL circuitry. There is good phase noise performance like -116.17dBc/Hz in 1MHz offset frequency.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.45 no.6
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• pp.87-93
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• 2008

This paper describes implementation of the 5.0GHz RF frequency synthesizer with $0.18{\mu}m$ silicon CMOS technology being used as an application of the IEEE802.15.4 USN sensor node transceiver modules. To get good performance of speed and noise, design of the each module like VCO, prescaler, 1/N divider, fractional divider with ${\Sigma}-{\Delta}$ modulator, and common circuits of the PLL has been optimized. Especially to get good performance of speed, power consumption, and wide tuning range, N-P MOS core structure has been used in design of the VCO. The chip area including pads for testing is $1.1*0.7mm^2$, and the chip area only core for IP in SoC is $1.0*0.4mm^2$. Through comparing and analysing of the designed two kind of the frequency synthesizer, we can conclude that if we improve a litter characteristics there is no problem to use their as IPs.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.3
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• pp.493-497
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• 2005

This paper is about the research of the User Agent implementation under wireless embedded environment, using SIP which is one of protocol components construct the VoIP system. The User Agent is made of the User Agent configuration block, the device thread block to control devices and the SIP stack block to process SIP messages. The device thread consists of the RTP thread and the sound lard device processing block. Futhermore, the SIP stack consist of the worker thread to process proxy events, the SIP transceiver and SIP thread to transfer and receive SIP messages. The H/W platform is a board included the Intel's XScale PXA255 processor, flash memory, SDRAM, Audio CODEC module and wireless LAN threough PCMCIA socket, furthermore a microphone and headphone is used by the audio 1/0. The system has embedded linux kernel 2.4.19. For embedded environment, the function of User Agent and SIP method is diminished. Finally, the resource of system could be reduced about $12.9\%$, compared to overall system resource, by minimizing peripherals control and excepting TCP.

• Journal of Advanced Navigation Technology
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• v.24 no.6
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• pp.485-490
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• 2020

Recently, amid active research on domestic shipbuilding industry and IT convergence technology, with the development of satellite detection technology for ship safety operation, ships monitored the movement of ships with the mandatory long-range identification & tracking of vessels and automatic identification system. It is possible to help safe navigation, but it is necessary to develop safety device that alert the marine officer who rely on radar to correct conditions in case of weightlessness. Therefore, an ocean fog alarm system was developed to detect and inform using photo sensors. The fabricated ocean fog detect and alarm system consists of a small, low-power optical sensor transceiver and data sensing processing module. Through experiment, it is confirmed that the fabricated ocean fog detect and alarm system measure the corresponding concentration of ocean fog for fogless circumstance and fogbound circumstance, respectively. Furthermore, the fabricated system can control RPM of ship engine according to the concentration of ocean fog, and consequently, the fabricated system can be applied to assistant device for ship safety operation.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.50 no.2
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• pp.119-125
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• 2022

In this paper, we present design, implementation and test results of CTM (Chirp Transceiver Module) EM (Engineering Model) for C-Band SAR (Synthetic Aperture Radar) Payload. The CTM is designed to operate dual frequency scan method that simultaneously operate two frequencies in each 50MHz bandwidth to achieve 120Km swath with 10m resolution at about 500Km altitude. The CTM used radiation tolerant RTG4 FPGA for space environment, and implemented with the Parallel DDS (PDDS) method which uses a small memory capacity compared to the memory-map method. Test results show high purity chirp signal generation and excellent IRF performance from received chirp signal after direct digital conversion.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.21 no.5
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• pp.162-170
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• 2022

In this paper, the phased-array transceiver (TRX) channel amplitude and phase calibration method for a radar wind profiler (RWP) based on the 256 active phased array is discussed. Without the additional module, the TX and RX calibration paths were secured using couplers and switches in the TRX front ends and the TRX switching duplexers, and the amplitude and phase of the 256 TRX were calibrated using a gain and phase detector. The beam widths and side lobes of five beams (vertical, east, west, south, and north) of the calibrated 256 active phased array antenna were confirmed by a near-field which agreed well with the simulation results. The proposed calibration method can be easily applied to a system based on an active phased array operated in an outdoor environment.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.23 no.5
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• pp.131-138
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• 2023

In this paper, a free space optical communication device that can be used in a mobile base station of several km or less was fabricated and its characteristics were investigated. To overcome the loss due to atmospheric transmission, an optical fiber amplifier (EDFA) with an output of 23 dBm or more was used. In order to increase the focusing speed and miniaturization of the laser beam, an optical lens was manufactured, and a transmission lens was designed to have beam divergence within the range of 1.5 to 1.8 [mrad]. A PT module that controls PAN/TILT was fabricated in order to reduce pointing errors and effective automatic alignment between transceiver devices. In this study, Reed-Solomon (RS) code was used to maintain the transmission quality above a certain level. It was manufactured to be able to communicate at a wireless distance of 300m in a weather situation with visibility of 300m. For performance measurement, it was measured using BERT and eye pattern analyzer, and it was confirmed that BER can be maintained at 2.5Gbps.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.2
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• pp.93-100
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• 2009

This paper presents a step up four channel DC-DC converter using charge pump voltage doubler structure. Our goal is to design and implement DC-DC converter for capacitive SP4T RF MEMS switch in front end module in wireless transceiver system. Charge pump structure is small and consume low power 3.3V input voltage is boosted by DC-DC Converter to $11.3{\pm}0.1V$, $12.4{\pm}0.1V$, $14.1{\pm}0.2V$ output voltage With 10MHz switching frequency. By using voltage level shifter structure, output of DC-DC converter is selected by 3.3V four channel selection signals and transferred to capacitive MEMS devices. External passive devices are not used for driving DC-DC converter. The total chip area is $2.8{\times}2.1mm^2$ including pads and the power consumption is 7.52mW, 7.82mW, 8.61mW.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.58-63
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• 2013

This paper presents a transceiver design for DisplayPort interface using an optical channel. By converting the electronic channel to the optical channel, the DisplayPort's main channel can provide a high-speed data transmission for long distance. The design converting the electronic channel to the optical channel in the main channel and AUX channel of the DisplayPort is presented in this paper. Futhermore, the HPD signal transmission by using AUX channel is proposed. In order to minimize power consumption, this paper also proposed a method of controlling the TX block in the main link. The proposed system is designed by a FPGA and an optical module. The FPGA used 651 ALUT(adaptive look-up table)s, 511 resisters and 324 block memory bits. The maximum operating rate of the FPGA is 250MHz. With the proposed power control scheme, 740mW of power dissipation reduction can be achieved at the main link optical TX module.