• Journal of the Korea Society of Computer and Information
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• v.4 no.1
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• pp.28-37
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• 1999

In this paper. we developed a delay test architecture and test procedure for clocked 5-bit asynchronous counter circuit based on boundary scan architecture. To develope, we analyze the problems of conventional method on delay test for clocked sequential circuit in boundary scan architecture. This paper discusses several problems of delay test on boundary scan architecture for clocked sequential circuit. Conventional test method has some problems of improper capture timing, of same pattern insertion, of increase of test time. We suggest a delay test architecture and test procedure, is based on a clock count-generation technique to generate continuous clocks for clocked input of CUT. The simulation results or 5-bit counter shows the accurate operation and effectiveness of the proposed delay test architecture and procedure.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.55 no.1
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• pp.26-30
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• 2006

For the purpose of developing capacitive humidity sensor having interdigital electrodes, interdigital electrode was modeled and simulated to obtain capacitance and sensitivity as a function of geometric parameters like the structural gap and thickness. For the development of ASIC, switched capacitor signal processing circuits for capacitive humidity sensor were designed and simulated by Cadence using $0.25{\mu}m$ CMOS process parameters. The signal processing circuits are composed of amplifier for voltage gain control, and clock generator for sensor driving and switch control. The characteristics of the fabricated sensors are; 1) sensitivity is 9fF/%R.H., 2) temperature coefficient of offset(TCO) is $0.4%R.H./^{\circ}C$, 3) nonlinearity is 1.2%FS, 4) hysteresis is 1.5%FS in humidity range of $3%R.H.{\sim}98%R.H.$. The response time is 50 seconds in adsorption and 70 seconds in desorption. Fabricated process used in this capacitive humidity sensor having interdigital electrode are just as similar as conventional IC process technology. Therefore this can be easily mass produced with low cost, simple circuit and utilized in many applications for both industrial and environmental measurement and control system, such as monitoring system of environment, automobile, displayer, IC process room, and laboratory etc.

• Journal of Engineering Education Research
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• v.21 no.1
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• pp.77-89
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• 2018

The chromosomes of all the world are the same in all 24 pairs, but the key, skin color and appearance are different. Also, it is the resistance of adult disease, diabetes, cancer. In 1953, Watson, Crick of Cambridge University experimentally discovered a DNA double helix structure, and in 1962, They laureates the Nobel Prize. In 1964, Temin, University of Wisconsin, USA, experimentally identified the ability to copy gene information from RNA to DNA and received the Nobel Prize in 1975. In this paper, we analyzed 24 pairs of DNA chromosomes using mathematical matrices based on the combination order sequence of four groups, and designed the Taegeuk pattern genetic code for the first time in the world. In the case of normal persons, the middle Yin-Yang taegeuk is designed as a block circulant Jacket matrix in DNA, and the left-right and upper-lower pairs of east-west and north-south rulings are designed as pair complementary matrices. If (C U: A G) chromosomes are unbalanced, that is, people with disease or inheritance become squashed squirming patterns. In 2017, Professor Michel Young was awarded a Nobel by presenting a biological clock and experimentally explained the bio-imbalance through a yellow fruit fly experiment.This study proved mathematical matrices for balanced and unbalanced RNA.

• Proceedings of the KSRS Conference
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• 2003.11a
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• pp.384-386
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• 2003

GPS observation has been performed at Khon Kaen in northeast Thailand to investigate the Precipitable Water Vapor (PWV) change since August 2001 by using a Trimble 4000SSi receiver. The data obtained in the period from March to June in 2002 were processed by using CAMIT software to obtain the Zenith Tropospheric Delay (ZTD) at every one hour referring to some IGS stations around Thailand. We estimated the Zenith Hydrostatic Delay (ZHD) at every three hours with barometer data at Khon Kaen of Thai Meteorological Department, The Zenith Wet Delay (ZWD) was obtained by subtracting ZHD from ZTD and PWV can be calculated from ZTD. The results obtained shows that PWV changes with a large amplitude in March and April before the monsoon onset, and also we can see steep PWV increases before rain and decreases after rain. In May and June after the onset, the PWV is almost constant to be 60 to 70 mm, but there is a semi-diurnal change which has high PWV values at about 8 and 20 o'clock in local time.

• Current Industrial and Technological Trends in Aerospace
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• v.7 no.1
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• pp.119-127
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• 2009

There have been about 450 atomic frequency standards (or atomic clocks) launched into orbit for the use on communications and scientific payloads since 1970's. GPS satellites carry on-board Rubidium and Cesium atomic frequency standards which are utilized for the precise positioning and timing. The evolving technologies of space qualified atomic frequency standards have enhanced in the performance, reliability, and lifetime of satellites. In this paper we describe the fundamentals and performance of the atomic frequency standards, and introduce the atomic frequency standards which are presently on-board various satellites systems. We also present the GPS time scale and its applications.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.12
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• pp.1243-1250
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• 2014

In this paper, a wideband DDS module covering the frequency range from 0.5 to 1.1 GHz was designed and fabricated. The clock frequency of the DDS was selected 2.4 GHz in order for 600 MHz output bandwidth. Multiple spurious cancelling signals having same amplitude and $180^{\circ}$ phase difference compared to the spurious were created at the additional path and added to the output signal within DDS for the spurious performance improvement. The fabricated DDS module showed better spurious performance than the commercial DDS one more than 10 dB and frequency tuning time was 340 ns below.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.38A no.12
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• pp.991-997
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• 2013

A new frequency tuning scheme and a transconductor with a wide tuning range and low harmonic distortion is presented. This frequency tuning technique is based on the relationship between the time-constant and the elapsed times in charging a capacitor up to a certain level. Its structure is as simple as that of a conventional tuning scheme using a VCF(Voltage-Controlled Filter) and it does not need a pure sine wave but uses a CLK(Clock) pulse as a reference signal, which is easily obtained from on-chip system clocks or external X-tal oscillators. When a certain reference CLK is given, without complex capacitor arrays the pole frequency of the filter can be controlled continuously in the frequency domain. Simulation results are presented to confirm the operation of the proposed approach.

• Journal of Biosystems Engineering
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• v.15 no.2
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• pp.134-142
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• 1990

This study was carried out for the development of greenhouse temperature control system by modifying an APPLE-II microcomputer attached with several interface systems. The interface systems are composed of 12 bit A/D converter, output port, multiplexer, time clock, etc. Under the operation of developed system, the greenhouse temperature was to be manipulated within the setting temperatures assumed to be appropriate for certain plant growth. The temperature control equimpents installed in the greenhouse are one-speed propeller type fan and two-phase electric heater, which are selectively started or stopped according to the control logic programmed in the control system. The results are summarized as follows : 1. The difference between two temperatures measured by the developed system and the self-recording thermometer calibrated with standard thermometer was less than $1^{\circ}C$. 2. When the temperature were measurd by 12 bit A/D converter and both electric heater and ventilation fan were controlled by developed ON/OFF logic, greenhouse temperature showed narrow fluctuation bands of less than $1^{\circ}C$ near the setting temperatures. 3. The temperature acquisition and control system developed in this study is expected to be applicable to environment control system such as greenhouse only by modifying the logic based on long term experimental data. 4. In order to reduce the measurement error and to increase the system control efficiency, it is recommended that continuous study should be carried out in the aspect of eliminating various systematic noises and improving the environmental control logic.

• Journal of Sensor Science and Technology
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• v.15 no.5
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• pp.334-340
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• 2006

A compact biosignal monitoring device was developed. Electrodes for electrocardiogram (ECG) and a LED and silicon detector for photoplethysmogram (PPG) were used. A lead II type was arranged for ECG measurement and reflected light was measured at the finger tip for PPG. A single chip microprocessor (model ADuC812, Analog Device) controlled a measurement protocol and processed measured signals. PPG and ECG had a sampling rate of 300 Hz with 8-bit resolution. The maximum power consumption was 100 mW. The microprocessor computed pulse transit time (PTT) between the R-wave of ECG and the peak of PPG. To increase the resolution of PTT, analog peak detectors obtained the peaks of ECG and PPG whose interval was calculated using an internal clock cycle of 921.6 kHz. The device was designed to be operated by 3-volt battery. Biosignals can be measured for $2{\sim}3$ days continuously without the external interruptions and data is stored to an on-board memory. Our system was successfully tested with human subjects.

• Structural Engineering and Mechanics
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• v.32 no.1
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• pp.95-126
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• 2009

The present contribution addresses the parallelization of advanced simulation methods for structural reliability analysis, which have recently been developed for large-scale structures with a high number of uncertain parameters. In particular, the Line Sampling method and the Subset Simulation method are considered. The proposed parallel algorithms exploit the parallelism associated with the possibility to simultaneously perform independent FE analyses. For the Line Sampling method a parallelization scheme is proposed both for the actual sampling process, and for the statistical gradient estimation method used to identify the so-called important direction of the Line Sampling scheme. Two parallelization strategies are investigated for the Subset Simulation method: the first one consists in the embarrassingly parallel advancement of distinct Markov chains; in this case the speedup is bounded by the number of chains advanced simultaneously. The second parallel Subset Simulation algorithm utilizes the concept of speculative computing. Speedup measurements in context with the FE model of a multistory building (24,000 DOFs) show the reduction of the wall-clock time to a very viable amount (<10 minutes for Line Sampling and ${\approx}$ 1 hour for Subset Simulation). The measurements, conducted on clusters of multi-core nodes, also indicate a strong sensitivity of the parallel performance to the load level of the nodes, in terms of the number of simultaneously used cores. This performance degradation is related to memory bottlenecks during the modal analysis required during each FE analysis.