• The Journal of the Korea institute of electronic communication sciences
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• v.12 no.6
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• pp.1009-1018
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• 2017

We developed new Digital Sampler for KVN(: Korean VLBI Network). The sampler has 1024MHz sampling frequency with 2bits/sample. The sampler's input reference frequencies are 1pps(: pulse per second) and 10MHz, also UTC(: Universal Time Coordinated) time information out with 1PPS signal, synchronized. The output of sampling data is adapted VSI(: VLBI Standard Interface) specification including the time information. In order to confirm the performance of the sampler, we carried out the astronomical radio observation test in Ulsan Radio Observatory of KVN. It was confirmed the stable performance. In this paper, We introduce the new developed sampler and present the observational test result.

• Journal of the Korea Society of Computer and Information
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• v.18 no.2
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• pp.31-39
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• 2013

In this paper, we propose a power-efficient scheduling scheme that stochastically minimizes the power consumption of a real-time parallel task while meeting the deadline on multicore processors. The proposed scheme applies the parallel processing that executes a task on multiple cores concurrently, and activates a part of all available cores with unused cores powered off, in order to save power consumption. It is proved that the proposed scheme minimizes the mean power consumption of a real-time parallel task with probabilistic computation amount on DVFS-enabled multicore processors with a finite set of discrete clock frequencies. Evaluation shows that the proposed scheme saves up to 81% power consumption of the previous method.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.1 no.2
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• pp.145-158
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• 1997

Method for synchronizing multimedia data is needed to support continuous transmission of multimedia data through a network in a bounded time and it also required for supporting continuous presentation of multimedia data with the required norminal playout rate in distributed network environments. This paper describes a new synchronization method for supporting delay-sensitive multimedia Presentation without degration of Quality of services of multimedia application. It mainly aims to support both intermedia and intermedia synchronization by absorbing network variations which may cause skew or jitter. In order to remove asynchonization problems, we make use of logical time system, dynamic buffer control method, and adjusting synchronization intervals based on the quality of services of a multimedia. It might be more suitable for working on distribute[1 multimedia systems where the network delay variation is changed from time to time and no global clock is supported. And it also can effectively reduce the amount of buffer requirements needed for transfering multimedia data between source and destination system by adjusting synchronization intervals with acceptable packet delay limits and packet loss rates.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 1993.06a
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• pp.975-976
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• 1993

This talk presents the overview of the author's research and development activities on fuzzy inference hardware. We involved it with two distinct approaches. The first approach is to use application specific integrated circuits (ASIC) technology. The fuzzy inference method is directly implemented in silicon. The second approach, which is in its preliminary stage, is to use more conventional microprocessor architecture. Here, we use a quantitative technique used by designer of reduced instruction set computer (RISC) to modify an architecture of a microprocessor. In the ASIC approach, we implemented the most widely used fuzzy inference mechanism directly on silicon. The mechanism is beaded on a max-min compositional rule of inference, and Mandami's method of fuzzy implication. The two VLSI fuzzy inference chips are designed, fabricated, and fully tested. Both used a full-custom CMOS technology. The second and more claborate chip was designed at the University of North Carolina(U C) in cooperation with MCNC. Both VLSI chips had muliple datapaths for rule digital fuzzy inference chips had multiple datapaths for rule evaluation, and they executed multiple fuzzy if-then rules in parallel. The AT & T chip is the first digital fuzzy inference chip in the world. It ran with a 20 MHz clock cycle and achieved an approximately 80.000 Fuzzy Logical inferences Per Second (FLIPS). It stored and executed 16 fuzzy if-then rules. Since it was designed as a proof of concept prototype chip, it had minimal amount of peripheral logic for system integration. UNC/MCNC chip consists of 688,131 transistors of which 476,160 are used for RAM memory. It ran with a 10 MHz clock cycle. The chip has a 3-staged pipeline and initiates a computation of new inference every 64 cycle. This chip achieved an approximately 160,000 FLIPS. The new architecture have the following important improvements from the AT & T chip: Programmable rule set memory (RAM). On-chip fuzzification operation by a table lookup method. On-chip defuzzification operation by a centroid method. Reconfigurable architecture for processing two rule formats. RAM/datapath redundancy for higher yield It can store and execute 51 if-then rule of the following format: IF A and B and C and D Then Do E, and Then Do F. With this format, the chip takes four inputs and produces two outputs. By software reconfiguration, it can store and execute 102 if-then rules of the following simpler format using the same datapath: IF A and B Then Do E. With this format the chip takes two inputs and produces one outputs. We have built two VME-bus board systems based on this chip for Oak Ridge National Laboratory (ORNL). The board is now installed in a robot at ORNL. Researchers uses this board for experiment in autonomous robot navigation. The Fuzzy Logic system board places the Fuzzy chip into a VMEbus environment. High level C language functions hide the operational details of the board from the applications programme . The programmer treats rule memories and fuzzification function memories as local structures passed as parameters to the C functions. ASIC fuzzy inference hardware is extremely fast, but they are limited in generality. Many aspects of the design are limited or fixed. We have proposed to designing a are limited or fixed. We have proposed to designing a fuzzy information processor as an application specific processor using a quantitative approach. The quantitative approach was developed by RISC designers. In effect, we are interested in evaluating the effectiveness of a specialized RISC processor for fuzzy information processing. As the first step, we measured the possible speed-up of a fuzzy inference program based on if-then rules by an introduction of specialized instructions, i.e., min and max instructions. The minimum and maximum operations are heavily used in fuzzy logic applications as fuzzy intersection and union. We performed measurements using a MIPS R3000 as a base micropro essor. The initial result is encouraging. We can achieve as high as a 2.5 increase in inference speed if the R3000 had min and max instructions. Also, they are useful for speeding up other fuzzy operations such as bounded product and bounded sum. The embedded processor's main task is to control some device or process. It usually runs a single or a embedded processer to create an embedded processor for fuzzy control is very effective. Table I shows the measured speed of the inference by a MIPS R3000 microprocessor, a fictitious MIPS R3000 microprocessor with min and max instructions, and a UNC/MCNC ASIC fuzzy inference chip. The software that used on microprocessors is a simulator of the ASIC chip. The first row is the computation time in seconds of 6000 inferences using 51 rules where each fuzzy set is represented by an array of 64 elements. The second row is the time required to perform a single inference. The last row is the fuzzy logical inferences per second (FLIPS) measured for ach device. There is a large gap in run time between the ASIC and software approaches even if we resort to a specialized fuzzy microprocessor. As for design time and cost, these two approaches represent two extremes. An ASIC approach is extremely expensive. It is, therefore, an important research topic to design a specialized computing architecture for fuzzy applications that falls between these two extremes both in run time and design time/cost. TABLEI INFERENCE TIME BY 51 RULES {{{{Time }}{{MIPS R3000 }}{{ASIC }}{{Regular }}{{With min/mix }}{{6000 inference 1 inference FLIPS }}{{125s 20.8ms 48 }}{{49s 8.2ms 122 }}{{0.0038s 6.4㎲ 156,250 }} }}

• Journal of Astronomy and Space Sciences
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• v.26 no.4
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• pp.451-466
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• 2009

While substorms are known to generally occur under southward IMF conditions, they can sometimes occur even under northward IMF conditions. In this paper, we studied the substorms that occurred in May, 2000 to 2002 to examine some statistical characteristics of the IMF and solar wind associated with northward IMF substorms. We focused on the cases where two or more substorms occurred successively under northward IMF conditions. Also, by checking Sym-H index associated with each of the substorms we determined whether or not there is any association of such northward IMF substorm occurrence with storm times. We also examined statistical properties at geosynchronous altitude in terms of magnetic field dipolarization and energetic particle injection. The following results were obtained. (i) Most of the northward IMF substorms occurred under average solar wind conditions. The majority of them occurred within 2 hrs duration of northward IMF Bz state, but there are also a nonnegligible number of substorms that occurred after a longer duraiton of northward IMF Bz state. (ii) While most of the substorms occurred as isolated from a magnetic storm time, those that occurred in a magnetic storm time show a higher average value of IMF and solar wind than that for the isolated substorms. (iii) About 55% of the substorms were associated with the IMF clock angle that can possibly allow dayside reconnection, and the other 45% were associated with more or less pure northward IMF conditions. Therefore, for the latter cases, the energy input from the solar wind into the magnetosphere should be made by other way than the dayside reconnection. (iv) For most of the substorms, the magnetic field dipolarizations and energetic particle injections at geosynchronous altitude were identified to be generally weak. But, several events indicated strong magnetic field dipolarizations and energetic particle injections.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.3
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• pp.896-905
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• 2010

The sensor networks can be used attractively for various application areas. Time synchronization is important for any Ubiquitous Sensor Networks (USN) systems. USN makes extensive use of synchronized time in many contexts for data fusion. However existing time synchronization protocols are available only for homogeneous sensor nodes of USN. It needs to be extended or redesigned in order to apply to the USN with heterogeneous sensor nodes. Because heterogeneous sensor nodes have different clock sources with the SinkNode of USN, it is impossible to be synchronized global time. In addition, energy efficiency is one of the most significant factors to influence the design of sensor networks, as sensor nodes are limited in power, computational capacity, and memory. In this paper, we propose specific time synchronization based on master-slave topology for the global time synchronization of USN with heterogeneous sensor nodes. The time synchronization master nodes are always able to be synchronized with the SinkNode. Then time synchronization master nodes enable time synchronization slave nodes to be synchronized sleep periods. The proposed master-slave time synchronization for heterogeneous sensor nodes of USN is also helpful for power saving by maintaining maximum sleep time.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.33 no.6
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• pp.2601-2610
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• 2013

The main limiting factors of Precise Point Positioning(PPP) accuracy are errors in broadcast satellite orbits, clock errors, and the others, which are receiver-dependent errors(ionospheric, tropospheric refraction, multipath, and tides, etc.). Therefore, to facilitate high precision PPP, precise orbits/clocks corrections, the receiver-dependent errors corrections have to apply to multi frequency GNSS measurements for an ionosphere free combination and integer ambiguity resolution in real-time. Currently, there are many Analysis Centers, which offer the precise corrections stream computed in real-time using the global or regional GNSS tracking network. The goles of this research considered performances of the real-time static PPP with using RTCM corrections from NTRIP casters. For this, the corrections streams of Analysis Centers received via NTRIP does apply to GNSS data of check points individually, as well as jointly, in accordance with various session lengths. After that, have compared the PPP results from the corrections streams with each other, and with Standard Point Positioning(SPP) results.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.53 no.1
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• pp.1-9
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• 2004

In this paper, we proposed a hardware(H/W) structure which can compress and recontruct the input image in real time operation and implemented it into a FPGA platform using VHDL(VHSIC Hardware Description Language). All the image processing element to process both compression and reconstruction in a FPGA were considered each of them was mapped into a H/W with the efficient structure for FPGA. We used the DWT(discrete wavelet transform) which transforms the data from spatial domain to the frequency domain, because use considered the motion JPEG2000 as the application. The implemented H/W is separated to both the data path part and the control part. The data path part consisted of the image processing blocks and the data processing blocks. The image processing blocks consisted of the DWT Kernel for the filtering by DWT, Quantizer/Huffman Encoder, Inverse Adder/Buffer for adding the low frequency coefficient to the high frequency one in the inverse DWT operation, and Huffman Decoder. Also there existed the interface blocks for communicating with the external application environments and the timing blocks for buffering between the internal blocks. The global operations of the designed H/W are the image compression and the reconstruction, and it is operated by the unit or a field synchronized with the A/D converter. The implemented H/W used the 54％(12943) LAB(Logic Array Block) and 9％(28352) ESB(Embedded System Block) in the APEX20KC EP20K600CB652-7 FPGA chip of ALTERA, and stably operated in the 70MHz clock frequency. So we verified the real time operation. that is. processing 60 fields/sec(30 frames/sec).

• Journal of Astronomy and Space Sciences
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• v.28 no.1
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• pp.55-62
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• 2011

The precise orbit determination (POD) of low earth orbiter (LEO) has complied with its required positioning accuracy by the double-differencing of observations between International GNSS Service (IGS) and LEO to eliminate the common clock error of the global positioning system (GPS) satellites and receiver. Using this method, we also have achieved the 1 m positioning accuracy of Korea Multi-Purpose Satellite (KOMPSAT)-2. However double-differencing POD has huge load of processing the global network of lots of ground stations because LEO turns around the Earth with rapid velocity. And both the centimeter accuracy and the near real time (NRT) processing have been needed in the LEO POD applications--atmospheric sounding or urgent image processing--as well as the surveying. An alternative to differential GPS for high accuracy NRT POD is precise point positioning (PPP) to use measurements from one satellite receiver only, to replace the broadcast navigation message with precise post processed values from IGS, and to have phase measurements of dual frequency GPS receiver. PPP can obtain positioning accuracy comparable to that of differential positioning. KOMPSAT-5 has a precise dual frequency GPS flight receiver (integrated GPS and occultation receiver, IGOR) to satisfy the accuracy requirements of 20 cm positioning accuracy for highly precise synthetic aperture radar image processing and to collect GPS radio occultation measurements for atmospheric sounding. In this paper we obtained about 3-5 cm positioning accuracies using the real GPS data of the Gravity Recover and Climate Experiment (GRACE) satellites loaded the Blackjack receiver, a predecessor of IGOR. And it is important to reduce the latency of orbit determination processing in the NRT POD. This latency is determined as the volume of GPS measurements. Thus changing the sampling intervals, we show their latency to able to reduce without the precision degradation as the assessment of their precision.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.46 no.1
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• pp.76-81
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• 2009

A novel design method of time-interleaved subranging ADC is presented. We use the bisection method to let only half of comparators in typical subranging ADC working in every clock cycle. Thus, we are able to reduce the number of comparators by half. It is possible to reduce the die size. An example of 8-bit time-interleaved subranging ADC operates at 40MHz sampling rate and 1.8V supply voltage is demonstrated. The power consumption of the proposed circuit is only 10mV with SPECTRE simulation. Compared with the typical subranging ADC, our bisection method is able to reduce up to 40% in die size.