• Title/Summary/Keyword: thin-film transistor

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A Study on the Electrical Characteristics of Organic Thin Film Transistor, OTFT With Plasma-Treated Gate Insulators (Plasma 처리한 유기 절연층을 갖는 유기 박막 트랜지스터의 전기적 특성 연구)

  • 김연주;박재훈;강성인;최종선
    • Journal of the Korean Vacuum Society
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    • v.13 no.3
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    • pp.99-102
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    • 2004
  • In this work the electrical characteristics of organic thin film transistors with the surface-treated organic gate insulator have been studied. For the surface treatment of gate dielectric, Ar plasma was used. Pentacene and PVP were used as active and dielectric layers respectively. Pentacene was thermally evaporated in vacuum at a pressure of about $10^{-6}$ Torr and at a deposition rate of 0.5 $\AA$/sec. PVP was spin coated and cured at $100^{\circ}C$. before pentacene deposition. organic thin film transistors with surface-treated gate insulators have provided improved operation characteristics.

A Study on Wet Etch Behavior of Zinc Oxide Semiconductor in Acid Solutions

  • Seo, Bo-Hyun;Lee, Sang-Hyuk;Jeon, Jea-Hong;Choe, Hee-Hwan;Lee, Kang-Woong;Lee, Yong-Uk;Seo, Jong-Hyun
    • 한국정보디스플레이학회:학술대회논문집
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    • 2007.08a
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    • pp.926-929
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    • 2007
  • A significant progress has been made in the characterization of zinc oxide (ZnO) semiconductor as a new semiconductor layer instead of amorphous Si semiconductor used in thin film transistor due to its high electron mobility at low deposition temperature which is quite suitable for flexible display and OLED devices. The wet pattering of ZnO is another important issue with regard to mass production of ZnO thin film transistor device. However, the wet behavior of ZnO thin film in aqueous wet etching solutions conventionally used un TFT industry has not been reported yet, in this work, wet corrosion behavior of RF magnetron sputtered ZnO thin film in various wet solutions such as phosphoric and nitric acid solutions was studied using by electrochemical analysis. The effects of deposition parameters such as RF power and oxygen partial pressure on corrosion rate are also examined.

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Atmospheric Pressure Plasma를 이용한 Oxide Thin Film Transistor의 특성 개선 연구

  • Mun, Mu-Gyeom;Kim, Ga-Yeong;Yeom, Geun-Yeong
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.582-582
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    • 2013
  • Oxide TFT (thin film transistor) active channel layer에 대한 저온 열처리 공정은 투명하고 flexibility을 기반으로하는 display 산업과 AMOLED (active matrix organic light emitting diode) 분야 등 다양한 분야에서 필요로 하는 기술로서 많은 연구가 이루어지고 있다. 과거 active layer는 ALD (atomic layer deposition), CVD (chemical vapor deposition), pulse laser deposition, radio frequency-dc (RF-dc) magnetron sputtering 등과 같은 고가의 진공 장비를 이용하여 증착 되어져 왔으나 현재에는 진공 장비 없이 spin-coating 후 열처리 하는 저가의 공정이 주로 연구되어 지고 있다. Flexible 기판들은 일반적인 OTFT (oxide thin films Transistor)에 적용되는 열처리 온도로 공정 진행시 열에 의한 기판의 손상이 발생한다. Flexible substrate의 열에 의한 기판 손상을 막기 위해 저온 열처리 공정이 연구되고 있지만 기존 열처리와 비교하여 소자의 특성 저하가 동반 되었다. 본 연구에서는 Si 기판위에 SiO2 (100)를 절연층으로 증착하고 그 위에 IZO (indium zinc oxide) solution을 spin-coating 한뒤 $250^{\circ}C$ 이하의 온도에서 열처리하였다. 저온 공정으로 인하여 소자의 특성 저하가 동반 되었으므로 소자의 저하된 특성 복원하고자 post-treatment로 고가의 진공장비가 필요 없고 roll-to roll system 적용이 수월한 remote-type의 APP (atmospheric pressure plasma) 처리를 하였다. Post-treatment로 APP를 이용하여 $250^{\circ}C$ 이하에서 소자에 적용 가능한 on/off ratio를 얻을 수 있었다.

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Electrical Characteristics and Leakage Current Mechanism of High Temperature Poly-Si Thin Film Transistors (고온 다결정 실리콘 박막트랜지스터의 전기적 특성과 누설전류 특성)

  • 이현중;이경택;박세근;박우상;김형준
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.11 no.10
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    • pp.918-923
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    • 1998
  • Poly-silicon thin film transistors were fabricated on quartz substrates by high temperature processes. Electrical characteristics were measured and compared for 3 transistor structures of Standard Inverted Gate(SIG), Lightly Doped Drain(LDD), and Dual Gate(DG). Leakage currents of DG and LDD TFT's were smaller that od SIG transistor, while ON-current of LDD transistor is much smaller than that of SIG and DG transistors. Temperature dependence of the leakage currents showed that SIG and DG TFT's had thermal generation current at small drian bias and Frenkel-Poole emission current at hight gate and drain biases, respectively. In case of LDD transistor, thermal generation was the dominant mechanism of leakage current at all bias conditions. It was found that the leakage current was closely related to the reduction of the electric field in the drain depletion region.

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Electrical Characteristic of PMMA Thin Film by Plasma Polymerization Method with Process Pressure and RF Substrate Bias Power (공정압력 및 기판바이어스 인가유무에 따른 PMMA 플라즈마중합박막의 전기적 특성)

  • Lee, Boong-Joo
    • The Journal of the Korea institute of electronic communication sciences
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    • v.6 no.5
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    • pp.697-702
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    • 2011
  • In this paper, We have fabricated PMMA thin films by plasma polymerization method for organic thin film transistor's insulator layer. In the electrical characteristic results with deposition pressures and substrate RF bias power in thin film deposition process, we have got dielectric constant of 3.4, high deposition rate of 8.6 [nm/min] and high insulation characteristics in condition of RF100 [W], Ar20 [sccm], 5 [mtorr], RF bias 20 [W]. Therefore, the fabricated thin films are possible as insulation layer of OTFT and organic memory.

A Study on the Silicon Nitride for the poly-Si Thin film Transistor (다결정 박막 트랜지스터 적용을 위한 SiNx 박막 연구)

  • 김도영;김치형;고재경;이준신
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.12S
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    • pp.1175-1180
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    • 2003
  • Transformer Coupled Plasma Chemical Vapor Deposited (TCP-CVD) silicon nitride (SiNx) is widely used as a gate dielectric material for thin film transistors (TFT). This paper reports the SiNx films, grown by TCP-CVD at the low temperature (30$0^{\circ}C$). Experimental investigations were carried out for the optimization o(SiNx film as a function of $N_2$/SiH$_4$ flow ratio varying ,3 to 50 keeping rf power of 200 W, This paper presents the dielectric studies of SiNx gate in terms of deposition rate, hydrogen content, etch rate and leakage current density characteristics lot the thin film transistor applications. And also, this work investigated means to decrease the leakage current of SiNx film by employing $N_2$ plasma treatment. The insulator layers were prepared by two step process; the $N_2$ plasma treatment and then PECVD SiNx deposition with SiH$_4$, $N_2$gases.

Single Crystal Silicon Thin Film Transistor using 501 Wafer for the Switching Device of Top Emission Type AMOLEDs (SOI 웨이퍼를 이용한 Top emission 방식 AMOLEDs의 스위칭 소자용 단결정 실리콘 트랜지스터)

  • Chang, Jae-Won;Kim, Hoon;Shin, Kyeong-Sik;Kim, Jai-Kyeong;Ju, Byeong-Kwon
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.16 no.4
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    • pp.292-297
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    • 2003
  • We fabricated a single crystal silicon thin film transistor for active matrix organic light emitting displays(AMOLEDs) using silicon on insulator wafer (SOI wafer). Poly crystal silicon thin film transistor(poly-Si TFT) Is actively researched and developed nowsdays for a pixel switching devices of AMOLEDs. However, poly-Si TFT has some disadvantages such as high off-state leakage currents and low field-effect mobility due to a trap of grain boundary in active channel. While single crystal silicon TFT has many advantages such as high field effect mobility, low off-state leakage currents, low power consumption because of the low threshold voltage and simultaneous integration of driving ICs on a substrate. In our experiment, we compared the property of poly-Si TFT with that of SOI TFT. Poly-Si TFT exhibited a field effect mobility of 34 $\textrm{cm}^2$/Vs, an off-state leakage current of about l${\times}$10$\^$-9/ A at the gate voltage of 10 V, a subthreshold slope of 0.5 V/dec and on/off ratio of 10$\^$-4/, a threshold voltage of 7.8 V. Otherwise, single crystal silicon TFT on SOI wafer exhibited a field effect mobility of 750 $\textrm{cm}^2$/Vs, an off-state leakage current of about 1${\times}$10$\^$-10/ A at the gate voltage of 10 V, a subthreshold slope of 0.59 V/dec and on/off ratio of 10$\^$7/, a threshold voltage of 6.75 V. So, we observed that the properties of single crystal silicon TFT using SOI wafer are better than those of Poly Si TFT. For the pixel driver in AMOLEDs, the best suitable pixel driver is single crystal silicon TFT using SOI wafer.

Thin Film Morphology Pentacene Thin Film Using Low-Pressure Gas Assisted Organic Vapor Deposition(LP-GAOVD)

  • Ahn, Seong-Deok;Kang, Seung-Youl;Lee, Yong-Eui;Kim, Chul-Am;Joung, Meyong-Ju;Suh, Kyung-Soo
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.998-1000
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    • 2003
  • We have investigated thin film morphology of pentacene thin films by the process of low-pressure gas assisted organic vapor deposition (LP-GAOVD). Source temperature, inert gas flow rate, substrate temperature and deposition pressure during film deposition is used to vary the growth rate, thin film morphology and the crystalline grain size of pentacene thin films. The electrical properties of pentacene thin films for applications in organic thin film transistor and electrophoretic displays will be discussed.

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Characterization of ZTO Thin Films Transistor Deposited by On-axis Sputtering and Facing Target Sputtering(FTS) (On-axis 스퍼터링과 FTS 공정으로 증착한 ZTO 박막트랜지스터의 특성)

  • Lee, Se-Hee;Yoon, Soon-Gil
    • Korean Journal of Materials Research
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    • v.26 no.12
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    • pp.676-680
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    • 2016
  • We have investigated the properties of thin film transistors(TFT) fabricated using zinc tin oxide(ZTO) thin films deposited via on-axis sputtering and FTS methods. ZTO thin films deposited by FTS showed lower root-mean-square(RMS) roughness and more uniformity than those deposited via on-axis sputtering. We observed enhanced electrical properties of ZTO TFT deposited via FTS. The ZTO films were deposited at room temperature via on-axis sputtering and FTS. The as-deposited ZTO films were annealed at $400^{\circ}C$. The TFT using the ZTO films deposited via FTS process exhibited a high mobility of $12.91cm^2/V.s$, a low swing of 0.80 V/decade, $V_{th}$ of 5.78 V, and a high $I_{on/off}$ ratio of $2.52{\times}10^6$.

The Effects of Nanocrystalline Silicon Thin Film Thickness on Top Gate Nanocrystalline Silicon Thin Film Transistor Fabricated at 180℃

  • Kang, Dong-Won;Park, Joong-Hyun;Han, Sang-Myeon;Han, Min-Koo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.8 no.2
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    • pp.111-114
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    • 2008
  • We studied the influence of nanocrystalline silicon (nc-Si) thin film thickness on top gate nc-Si thin film transistor (TFT) fabricated at $180^{\circ}C$. The nc-Si thickness affects the characteristics of nc-Si TFT due to the nc-Si growth similar to a columnar. As the thickness of nc-Si increases from 40 nm to 200 nm, the grain size was increased from 20 nm to 40 nm. Having a large grain size, the thick nc-Si TFT surpasses the thin nc-Si TFT in terms of electrical characteristics such as field effect mobility. The channel resistance was decreased due to growth of the grain. We obtained the experimental results that the field effect mobility of the fabricated devices of which nc-Si thickness is 60, 90 and 130 nm are 26, 77 and $119\;cm^2/Vsec$, respectively. The leakage current, however, is increased from $7.2{\times}10^{-10}$ to $1.9{\times}10^{-8}\;A$ at $V_{GS}=-4.4\;V$ when the nc-Si thickness increases. It is originated from the decrease of the channel resistance.