• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.187-187
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• 2012

In this report, the plasmonic nanopores of less than 5 nm diameter were fabricated on the apex of the pyramidal cavity array. The metallic pyramidal pit cavity can also utilized as the plasmonic bioreactor, and the fabricated Au or Al metallic nanopore can provide the controllable translocation speed down using the plasmonic optical force. Initially, the SiO2 nanopore on the pyramidal pit cavity were fabricated using conventional microfabrication techniques. Then, the metallic thin film was sputter-deposited, followed by surface modification of the nanometer thick membrane using FESEM, TEM and EPMA. The huge electron intensity of FESEM with ~microsecond scan speed can provide the rapid solid phase surface transformation. However, the moderate electron beam intensity from the normal TEM without high speed scanning can only provide the liquid phase surface modification. After metal deposition, the 100 nm diameter aperture using FIB beam drilling was obtained in order to obtain the uniform nano-aperture. Then, the nanometer size aperture was reduced down to ~50 nm using electron beam surface modification using high speed scanning FESEM. The followed EPMA electron beam exposure without high speed scanning presents the reduction of the nanosize aperture down to 10 nm. During these processes, the widening or the shrinking of the nanometer pore was observed depending upon the electron beam intensity. Finally, using 200 keV TEM, the diameter of the nanopore was successively down from 10 nm down to 1.5 nm.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.105-105
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• 2012

We have developed a photoemission-assisted plasma-enhanced chemical vapor deposition (PAPE-CVD) [1,2], in which photoelectrons emitting from the substrate surface irradiated with UV light ($h{\nu}$=7.2 eV) from a Xe excimer lamp are utilized as a trigger for generating DC discharge plasma as depicted in Fig. 1. As a result, photoemission-assisted plasma can appear just above the substrate surface with a limited interval between the substrate and the electrode (~10 mm), enabling us to suppress effectively the unintended deposition of soot on the chamber walls, to increase the deposition rate, and to decrease drastically the electric power consumption. In case of the deposition of DLC gate insulator films for the top-gate graphene channel FET, plasma discharge power is reduced down to as low as 0.01W, giving rise to decrease significantly the plasma-induced damage on the graphene channel [3]. In addition, DLC thickness can be precisely controlled in an atomic scale and dielectric constant is also changed from low ${\kappa}$ for the passivation layer to high ${\kappa}$ for the gate insulator. On the other hand, negative electron affinity (NEA) of a hydrogen-terminated diamond surface is attractive and of practical importance for PAPECVD, because the diamond surface under PAPE-CVD with H2-diluted (about 1%) CH4 gas is exposed to a lot of hydrogen radicals and therefore can perform as a high-efficiency electron emitter due to NEA. In fact, we observed a large change of discharge current between with and without hydrogen termination. It is noted that photoelectrons are emitted from the SiO2 (350 nm)/Si interface with 7.2-eV UV light, making it possible to grow few-layer graphene on the thick SiO2 surface with no transition layer of amorphous carbon by means of PAPE-CVD without any metal catalyst.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.108-109
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• 2012

This talk will begin with the demonstration of facile synthesis of silicon nanostructures using the magnesiothermic reduction on silica nanostructures prepared via self-assembly, which will be followed by the characterization results of their performance for energy storage. This talk will also report the fabrication and characterization of highly porous, stretchable, and conductive polymer nanocomposites embedded with carbon nanotubes (CNTs) for application in flexible lithium-ion batteries. It will be presented that the porous CNT-embedded PDMS nanocomposites are capable of good electrochemical performance with mechanical flexibility, suggesting these nanocomposites could be outstanding anode candidates for use in flexible lithium-ion batteries. Directed self-assembly (DSA) of block copolymers (BCPs) can generate uniform and periodic patterns within guiding templates, and has been one of the promising nanofabrication methodologies for resolving the resolution limit of optical lithography. BCP self-assembly processing is scalable and of low cost, and is well-suited for integration with existing semiconductor manufacturing techniques. This talk will introduce recent research results (of my research group) on the self-assembly of Si-containing block copolymers for the achievement of sub-10 nm resolution, fast pattern generation, transfer-printing capability onto nonplanar substrates, and device applications for nonvolatile memories. An extraordinarily facile nanofabrication approach that enables sub-10 nm resolutions through the synergic combination of nanotransfer printing (nTP) and DSA of block copolymers is also introduced. This simple printing method can be applied on oxides, metals, polymers, and non-planar substrates without pretreatments. This talk will also report the direct formation of ordered memristor nanostructures on metal and graphene electrodes by the self-assembly of Si-containing BCPs. This approach offers a practical pathway to fabricate high-density resistive memory devices without using high-cost lithography and pattern-transfer processes. Finally, this talk will present a novel approach that can relieve the power consumption issue of phase-change memories by incorporating a thin $SiO_x$ layer formed by BCP self-assembly, which locally blocks the contact between a heater electrode and a phase-change material and reduces the phase-change volume. The writing current decreases by 5 times (corresponding to a power reduction of 1/20) as the occupying area fraction of $SiO_x$ nanostructures varies.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.376-376
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• 2012

Semiconductor nanowires (NWs) are future building block for nano-scale devices. Especially, Ge NWs are fascinated material due to the high electrical conductivity with high carrier mobility. It is strong candidate material for post-CMOS technology. However, thermal stability of Ge NWs are poor than conventional semiconductor material such as Si. Especially, when it reduced size as small as nano-scale it will be melted around CMOS process temperature due to the melting point depression. Recently, Graphene have been intensively interested since it has high carrier mobility with single atomic thickness. In addition, it is chemically very stable due to the $sp^2$ hybridization. Graphene films shows good protecting layer for oxidation resistance and corrosion resistance of metal surface using its chemical properties. Recently, we successfully demonstrated CVD growth of monolayer graphene using Ge catalyst. Using our growth method, we synthesized Ge/graphene core/shell (Ge@G) NW and conducted it for highly thermal stability required devices. We confirm the existence of graphene shell and morphology of NWs using SEM, TEM and Raman spectra. SEM and TEM images clearly show very thin graphene shell. We annealed NWs in vacuum at high temperature. Our results indicated that surface melting phenomena of Ge NWs due to the high surface energy from curvature of NWs start around $550^{\circ}C$ which is $270^{\circ}C$ lower than bulk melting point. When we increases annealing temperature, tip of Ge NWs start to make sphere shape in order to reduce its surface energy. On the contrary, Ge@G NWs prevent surface melting of Ge NWs and no Ge spheres generated. Furthermore, we fabricated filed emission devices using pure Ge NWs and Ge@G NWs. Compare with pure Ge NWs, graphene protected Ge NWs show enhancement of reliability. This growth approach serves a thermal stability enhancement of semiconductor NWs.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.1
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• pp.31-35
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• 2020

This study demonstrates metal-oxide based memtransistor device and the gate tunable memristive characteristic using atomic layer deposition (ALD) and ZnO n-type oxide semiconductor. We fabricated a memtransistor device having channel width 70 ㎛, channel length 5 ㎛, back gate, using 40 nm thick ZnO thin film, and measured gate-tunable memristive characteristics at each gate voltage (50V, 30V, 10V, 0V, -10V, -30V, -50V) under humidity of 40%, 50%, 60%, and 70% respectively, in order to investigate the relation between a memristive characteristic and hydrogen doping effect on the ZnO memtransistor device. The electron mobility and gate controllability of memtransistor device decreased with an increase of humidity due to increased electron carrier concentration by hydrogen doping effect. The gate-tunable memristive characteristic was observed under humidity of 60% 70%. Resistive switching ratio increased with an increase of humidity while it loses gate controllability. Consequently, we could obtain both gate controllability and the large resistive switching ratio under humidity of 60%.

• Structural Engineering and Mechanics
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• v.75 no.3
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• pp.369-376
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• 2020

The life of conventional steel plastic injection molds is long but manufacturing cost and time are prohibitive for using these molds for producing prototypes of products in limited numbers. Commonly used 3D printers and rapid prototyping methods are capable of directly converting the digital models of three-dimensional solid objects into solid physical parts. Depending on the 3D printer, the final product can be made from different material, such as polymer or metal. Rapid prototyping of parts with the polymeric material is typically cheaper, faster and convenient. However, the life of a polymer mold can be less than a hundred parts. Failure of a polymeric mold during the injection molding process can result in serious safety issues considering very large forces and temperatures are involved. In this study, the feasibility of the inspection of 3D printed molds with the surface response to excitation (SuRE) method was investigated. The SuRE method was originally developed for structural health monitoring and load monitoring in thin-walled plate-like structures. In this study, first, the SuRE method was used to evaluate if the variation of the strain could be monitored when loads were applied to the center of the 3D printed molds. After the successful results were obtained, the SuRE method was used to monitor the artifact (artificial damage) created at the 3D printed mold. The results showed that the SuRE method is a cost effective and robust approach for monitoring the condition of the 3D printed molds.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.392.1-392.1
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• 2016

Nowadays, research interest in developing the wearable devices are growing remarkably. Portable consumer electronic systems are becoming lightweight, flexible and even wearable. In fact, wearable electronics require energy storage device with thin, foldable, stretchable and conformable properties. Accordingly, developing the flexible energy storage devices with desirable abilities has become the main focus of research area. Among various energy storage devices, supercapacitors have been considered as an attractive next generation energy storage device owing to their advantageous properties of high power density, rapid charge-discharge rate, long-cycle life and high safety. The energy being stored in pseudocapacitors is relatively higher compared to the electrochemical double-layer capacitors, which is due to the continuous redox reactions generated in the electrode materials of pseudocapacitors. Generally, transition metal oxides/hydroxide (such as $Co_3O_4$, $Ni(OH)_2$, $NiFe_2O_4$, $MnO_2$, $CoWO_4$, $NiWO_4$, etc.) with controlled nanostructures (NSs) are used as electrode materials to improve energy storage properties in pseudocapacitors. Therefore, different growth methods have been used to synthesize these NSs. Of various growth methods, electrochemical deposition is considered to be a simple and low-cost method to facilely integrate the various NSs on conductive electrodes. Herein, we synthesized amorphous $NiWO_4$ NSs on cost-effective conductive textiles by a facile electrochemical deposition. The as-grown amorphous $NiWO_4$ NSs served as a flexible and efficient electrode for energy storage applications.

• Korean Journal of Materials Research
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• v.24 no.11
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• pp.573-577
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• 2014

The existing metal getters are invariably covered with thin oxide layers in air and the native oxide layer must be dissolved into the getter materials for activation. However, high temperature is needed for the activation, which leads to unavoidable deleterious effects on the devices. Therefore, to improve the device efficiency and gas-adsorption properties of the device, it is essential to synthesize the getter with a method that does not require a thermal activation temperature. In this study, getter material was synthesized using palladium oxide (PdOx) which can adsorb $H_2$ gas. To enhance the efficiency of the hydrogen and moisture absorption, a porous layer with a large specific area was fabricated by an etching process and used as supporting substrates. It was confirmed that the moisture-absorption performance of the $SiO_2/Si$ was characterized by water vapor volume with relative humidity. The gas-adsorption properties occurred in the absence of the activation process.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.194.1-194.1
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• 2015

Transition metal dichalcogenide (TMD) with layered structure, has recently been considered as promising candidate for next-generation flexible electronic and optoelectronic devices because of its superior electrical, optical, and mechanical properties.[1] Scalability of thickness down to a monolayer and van der Waals expitaxial structure without surface dangling bonds (consequently, native oxides) make TMD-based thin film transistors (TFTs) that are immune to the short channel effect (SCE) and provide very high field effect mobility (${\sim}200cm^2/V-sec$ that is comparable to the universal mobility of Si), respectively.[2] In addition, an excellent photo-detector with a wide spectral range from ultraviolet (UV) to close infrared (IR) is achievable with using $WSe_2$, since its energy bandgap varies between 1.2 eV (bulk) and 1.8 eV (monolayer), depending on layer thickness.[3] However, one of the critical issues that hinders the successful integration of $WSe_2$ electronic and optoelectronic devices is the lack of a reliable and controllable doping method. Such a component is essential for inducing a shift in the Fermi level, which subsequently enables wide modulations of its electrical and optical properties. In this work, we demonstrate n-doping method for $WSe_2$ on poly-4-vinylphenol and poly (melamine-co-formaldehyde) (PVP/PMF) insulating layer and adjust the doping level of $WSe_2$ by controlling concentration of PMF in the PVP/PMF layer. We investigated the doping of $WSe_2$ by PVP/PMF layer in terms of electronic and optoelectronic devices using Raman spectroscopy, electrical measurements, and optical measurements.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.52-52
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• 2009

To date, chalcogenide alloy such as $Ge_2Sb_2Te_5$(GST) have not only been rigorously studied for use in Phase Change Random Access Memory(PRAM) applications, but also temperature gap to make different states is not enough to apply to device between amorphous and crystalline state. In this study, we have investigated a new system of phase change media based on the In-Sb-Te(IST) ternary alloys for PRAM. IST chalcogenide thin films were prepared in trench structure (aspect ratio 5:1 of length=500nm, width=100nm) using Tri methyl Indium $(In(CH_3)_4$), $Sb(iPr)_3$ $(Sb(C_3H_7)_3)$ and $Te(iPr)_2(Te(C_3H_7)_2)$ precursors. MOCVD process is very powerful system to deposit in ultra integrated device like 100nm scaled trench structure. And IST materials for PRAM can be grown at low deposition temperature below $200^{\circ}C$ in comparison with GST materials. Although Melting temperature of 1ST materials was $\sim 630^{\circ}C$ like GST, Crystalline temperature of them was ~$290^{\circ}C$; one of GST were $130^{\circ}C$. In-Sb-Te materials will be good candidate materials for PRAM applications. And MOCVD system is powerful for applying ultra scale integration cell.