• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.27 no.10
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• pp.648-652
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• 2014

We have investigated the effect of electrical properties of amorphous InGaZnO thin film transistors (a-IGZO TFTs) by post thermal annealing in $O_2$ ambient. The post-annealed in $O_2$ ambient a-IGZOTFT is found to be more stable to be used for oxide-based TFT devices, and has better performance, such as the on/off current ratios, sub-threshold voltage gate swing, and, as well as reasonable threshold voltage, than others do. The interface trap density is controlled to achieve the optimum value of TFT transfer and output characteristics. The device performance is significantly affected by adjusting the annealing condition. This effect is closely related with the modulation annealing method by reducing the localized trapping carriers and defect centers at the interface or in the channel layer.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.307.1-307.1
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• 2016

Amorphous zinc tin oxide (ZTO) thin films are being widely studied for a variety electronic applications such as the transparent conducting oxide (TCO) in the field of photoelectric elements and thin film transistors (TFTs). Thin film transistors (TFTs) with transparent amorphous oxide semiconductors (TAOS) represent a major advance in the field of thin film electronics. Examples of TAOS materials include zinc tin oxide (ZTO), indium gallium zinc oxide (IGZO), indium zinc oxide, and indium zinc tin oxide. Among them, ZTO has good optical and electrical properties (high transmittance and larger than 3eV band gap energy). Furthermore ZTO does not contain indium or gallium and is relatively inexpensive and non-toxic. In this study, ZTO thin films were formed by UHV RF magnetron co-sputter deposition on silicon substrates and sapphires. The films were deposited from ZnO and SnO2 target in an RF argon and oxygen plasma. The deposition condition of ZTO thin films were controlled by RF power and post anneal temperature using rapid thermal annealing (RTA). The deposited and annealed films were characterized by X-ray diffraction (XRD), atomic force microscope (AFM), ultraviolet and visible light (UV-VIS) spectrophotometer.

• Journal of the Korean Society of Radiology
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• v.17 no.4
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• pp.625-631
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• 2023

The important requirement of industrial dynamic X-ray detector operating under high tube voltage up to 450 kVp for 24 hours and 7 days is to obtain significantly high radiation resistance. This study presents the radiation resistance characteristics of various thin film transistors (TFTs) with a-Si, poly-Si and IGZO semiconducting layers. IGZO TFT offering dozens of times higher field effect mobility than a-Si TFT was processed with highly hydrogenated plasma in between IGZO semiconducting layer and inter-layered dielectric. The hydrogenated IGZO TFT showed most sustainable radiation resistance up to 10,000Gy accumulated, thus, concluded that it is a sole switching device in X-ray imaging sensor offering dynamic X-ray imaging at high frame rate under extremely severe radiation environment such as automated X-ray inspection.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.354-355
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• 2013

최근 디스플레이 분야에서 amorphous InGaZnO (a-IGZO) thin film transistors (TFTs)는 a-Si:H에 비해 비정질 상태에서도 비교적 높은 이동도를 가지고 다결정 Si 반도체에 비해 저온공정이 가능하고 대면적화가 용이한 장점 때문에 주목받고 있다. 또한 넓은 밴드갭을 가지기 때문에 가시광선 영역에서 투명하여 투명소자에도 응용이 가능하다. 본 연구에서는 RF magnetron sputtering법을 이용하여 RF power의 변화에 따라 IGZO 박막의 positive bias stress (PBS)에 대한 안정성을 조사하였다. 소결된 타겟으로는 In:Ga:ZnO를 각각 2:2:1 mol%의 조성비로 소결하여 이용하였고, 공정 조건은 초기 압력 Torr, 증착 압력 Torr, Ar：O2=18：12 sccm로 고정하였다. 공정 변수로는 130 W, 150 W, 170 W, 200 W로 변화를 주어 실험을 진행하였다. PBS 측정은 gate bias를 10 V로 고정하여 stress 시간을 각각 0, 30, 100, 300, 1,000, 3,000, 7,000초를 적용하였다. 측정 결과 RF power가 증가할수록 문턱전압의 변화량이 증가하는 것을 보였다. 130 W의 경우 4.47 V의 변화량을 보였지만 200 W의 경우는 10.01 V로 증가되어 나타났다. 따라서 RF power을 낮추어 만들어진 소자의 경우 RF power를 높여 만들어진 소자에 비해 PBS에 대한 안정성이 더 높은 결과를 확인하였다.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.302.1-302.1
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• 2016

Solution-processed amorphous metal-oxide thin-film transistors (TFTs) are considered as promising candidates for the upcoming transparent and flexible electronics due to their transparent property, good performance uniformity and possibility to fabricate at a low-temperature. In addition, solution processing metal oxide TFTs may allow non-vacuum fabrication of flexible electronic which can be more utilizable for easy and low-cost fabrication. Recently, for high-mobility oxide TFTs, multi-layered oxide channel devices have been introduced such as superlattice channel structure and heterojunction structure. However, only a few studies have been mentioned on the bias illumination stress in the multi- layered oxide TFTs. Therefore, in this research, we investigated the effects of bias illumination stress in solution-processed bilayer oxide TFTs which are fabricated by the deep ultraviolet photochemical activation process. For studying the electrical and stability characteristics, we implemented positive bias stress (PBS) and negative bias illumination stress (NBIS). Also, we studied the electrical properties such as field-effect mobility, threshold voltage ($V_T$) and subthreshold slop (SS) to understand effects of the bilayer channel structure.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.5
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• pp.349-352
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• 2010

Thin-film transistors (TFTs) were fabricated using amorphous indium gallium zinc oxide (a-IGZO) channels by rf-magnetron sputtering at room temperature. We have studied the effect of oxygen partial pressure on the threshold voltage($V_{th}$) of a-IGZO TFTs. Interestingly, the $V_{th}$ value of the oxide TFTs are slightly shifted in the positive direction due to increasing $O_2$ partial pressure from 0.007 to 0.009 mTorr. The device performance is significantly affected by varying $O_2$ ratio, which is closely related with oxygen vacancies provide the needed free carriers for electrical conduction.

• ETRI Journal
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• v.31 no.6
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• pp.660-666
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• 2009

We investigate the effects of interfacial dielectric layers (IDLs) on the electrical properties of top-gate In-Ga-Zn-oxide (IGZO) thin film transistors (TFTs) fabricated at low temperatures below $200^{\circ}C$, using a target composition of In:Ga:Zn = 2:1:2 (atomic ratio). Using four types of TFT structures combined with such dielectric materials as $Si_3N_4$ and $Al_2O_3$, the electrical properties are analyzed. After post-annealing at $200^{\circ}C$ for 1 hour in an $O_2$ ambient, the sub-threshold swing is improved in all TFT types, which indicates a reduction of the interfacial trap sites. During negative-bias stress tests on TFTs with a $Si_3N_4$ IDL, the degradation sources are closely related to unstable bond states, such as Si-based broken bonds and hydrogen-based bonds. From constant-current stress tests of $I_d$ = 3 ${\mu}A$, an IGZO-TFT with heat-treated $Si_3N_4$ IDL shows a good stability performance, which is attributed to the compensation effect of the original charge-injection and electron-trapping behavior.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.594-600
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• 2014

A threshold voltage compensation pixel circuit was developed for active-matrix organic light emitting diodes (AMOLEDs) using amorphous indium-gallium-zinc-oxide thin-film transistors (a-IGZO-TFTs). Oxide TFTs are n-channel TFTs; therefore, we developed a circuit for the n-channel TFT characteristics. The proposed pixel circuit was verified and proved by circuit analysis and circuit simulations. The proposed circuit was able to compensate for the threshold voltage variations of the drive TFT in AMOLEDs. The error rate of the OLED current for a threshold voltage change of 3 V was as low as 1.5%.

• Journal of Information Display
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• v.13 no.4
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• pp.179-183
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• 2012

In this paper, a gate driver circuit for In-Ga-Zn-O thin-film transistors (TFTs) driven by only two clock signals is reported. In this circuit, the TFTs are turned off with a negative $V_{GS}$ by the two clock signals. As a result, it works properly and suppresses power consumption increase even though the TFT $V_T$ shifts in the negative direction.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.2
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• pp.239-244
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• 2017

We experimentally investigate the physical mechanism for asymmetrical degradation in amorphous indium-gallium-zinc oxide (a-IGZO) thin-film transistors (TFTs) under simultaneous gate and drain bias stresses. The transfer curves exhibit an asymmetrical negative shift after the application of gate-to-source ($V_{GS}$) and drain-to-source ($V_{DS}$) bias stresses of ($V_{GS}=24V$, $V_{DS}=15.9V$) and ($V_{GS}=22V$, $V_{DS}=20V$), but the asymmetrical degradation is more significant after the bias stress ($V_{GS}$, $V_{DS}$) of (22 V, 20 V) nevertheless the vertical electric field at the source is higher under the bias stress ($V_{GS}$, $V_{DS}$) of (24 V, 15.9 V) than (22 V, 20 V). By using the modified external load resistance method, we extract the source contact resistance ($R_S$) and the voltage drop at $R_S$ ($V_{S,\;drop}$) in the fabricated a-IGZO TFT under both bias stresses. A significantly higher RS and $V_{S,\;drop}$ are extracted under the bias stress ($V_{GS}$, $V_{DS}$) of (22 V, 20V) than (24 V, 15.9 V), which implies that the high horizontal electric field across the source contact due to the large voltage drop at the reverse biased Schottky junction is the dominant physical mechanism causing the asymmetrical degradation of a-IGZO TFTs under simultaneous gate and drain bias stresses.