• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제41회 하계 정기 학술대회 초록집
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• pp.252-252
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• 2011

최근 주목받고 있는 amorphous gallium-indium-zinc-oxide (a-GIZO) thin film transistors (TFTs)는 수소가 첨가된 비정질 실리콘 TFT에 비해 높은 이동도와 뛰어난 전기적, 광학적 특성에 의해 큰 주목을 받고 있다. 또한 넓은 밴드갭을 가지므로 가시광 영역에서 투명한 특성을 보이고, 플라스틱 기판 위에서 구부러지는 성질에 의해 플랫 패널 디스플레이나 능동 유기 발광소자 (AM-OLED), 투명 디스플레이에 응용되고 있다. 뿐만 아니라, 일반적인 Poly-Si TFT는 자체적으로 가지는 결정성에 의해 대면적화 시 균일성이 좋지 못하지만 GIZO는 비정질상 이기 때문에 백플레인의 대면적화에 유리하다는 장점이 있다. 이러한 TFT를 제작하기 전, 전기적 특성에 대한 정보를 얻거나 예측하는 것이 중요한데, 이에 따라 고안된 구조가 바로 metal point contact FET (pseudo FET)이다. pseudo FET은 소스/드레인 전극을 따로 증착할 필요 없이 채널을 증착한 후, 프로브 탐침을 채널의 표면에 적당한 압력으로 접촉시켜 전하를 공급하는 소스와 드레인처럼 동작시킬 수 있다. 따라서 소스/드레인을 증착하거나 lithography와 같은 추가적인 공정을 요구하지 않아 소자의 특성을 보다 간단하고 수월하게 분석할 수 있다는 장점이 있다. 본 연구에서는 p-type 기판위에 100nm의 oxidation SiO2를 게이트 절연막으로 사용하는 a-GIZO pseudo FET를 제작하였다. 소자 제작 후, 열처리 온도에 따른 전기적 특성을 분석하였고, 열처리 조건은 30분간 N2 분위기에서 실시하였다. 열처리 후 전기적 특성 분성 결과, 450oC에서 가장 낮은 subthreshold swing 값과 게이트 전압의 더블 스윕 후 문턱 전압의 변화가 거의 없음을 확인하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.251-251
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• 2011

본 연구에서는 Zr이 도핑 된 ZnSnO (ZZTO) 기반의 물질을 액상공정을 이용하여 합성하고, 박막트랜지스터를 제작하였다. 출발 물질로써 지르코늄 클로라이드 (ZrCl4), 아연 아세테이트 디하이드레이트 ($Zn(CH_3COO)_2{\cdot}2H_3O$), 틴 클로라이드 ($SnCl_2$)를 아연과 주석 프리커서의 비율을 4:7로 고정하고, 지르코늄 프리커서의 몰비를 변형시켜 제작하였다. 제작된 솔루션은 0.25몰의 몰 농도로 고정하였다. 솔벤트로는 2-메톡시에탄올 (2-methoxyethanol)을 사용하였으며, 준비된 솔루션은 $0.2{\mu}m$ 필터를 이용하여 필터링을 실시하였다. Heavily doped p+ Si 기판에 열적 산화법을 이용하여 120 nm 두께의 $SiO_2$를 성장시킨 것을 게이트 및 게이트 절연막으로 이용하였으며, 스핀코팅을 이용하여 ZZTO 박막을 코팅하였다. 코팅 된 기판은 $300^{\circ}C$에서 $500^{\circ}C$ 사이로 2시간 열처리를 실시하였으며, 마지막으로 소오스/드레인을 스퍼터링법으로 Al을 증착하였다. Zr 함량비, 열처리 온도, 제작된 솔루션의 온도에 따른 박막단계를 파악하기 위해 X-ray photoelectron spectroscopy (XPS), thermogravimetry differential thermal analyzer (TG-DTA), X-ray diffractometer (XRD), high-resolution transmission electron microscopy (HR-TEM), Hall-effect measurement, UV-Vis spectroscopy 분석을 실시하였으며, 제작된 소자는 semiconductor analyzer (HP4156C)를 이용하여 측정하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2000년도 추계학술대회 논문집 학회본부 C
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• pp.455-457
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• 2000

In this work the electrical characteristics of organic TFTs with the semiconductor-insulator interfaces, where the gate dielectrics were treated by the two methods which are the deposition of Octadecyltrichlorosilane (OTS) on the insulator and rubbing the insulator surface. Pentacene is used as an active semiconducting layer. The semiconductor layer of pentacene was thermally evaporated in vacuum at a pressure of about $2{\times}10^{-7}$ Torr and at a deposition rate of $0.3{\AA}/sec$. Aluminum and gold were used for the gate and source/drain electrodes. OTS is used as a self-alignment layer between $SiO_2$ and pentacene. The gate dielectric surface was rubbed before pentacene is deposited on the insulator. In order to confirm the changes of the surface morphology the atomic force microscopy (AFM) was utilized. The characteristics of the fabricated TFTs are measured to clarify the effects of the surface treatment.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2012년도 춘계학술발표대회
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• pp.66.1-66.1
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• 2012

Although all printed cost-less radio frequency identification (RFID) tags have been considered as a core tool for bringing up a ubiquitous society, the difficulties in integrating thin film transistors (TFTs), diodes and capacitors on plastic foils using a single in-line printing method nullify their roles for the realization of the ubiquitous society1,2. To prove the concept of all printed cost-less RFID tag, the practical degree of the integration of those devices on the plastic foils should be successfully printed to demonstrate multi bit RFID tag. The tag contains key device units such as 13.56 MHz modulating TFT, digital logic gates and 13.56 MHz rectifier to generate and transfer multi bit digital codes via a wireless communication (13.56 MHz). However, those key devices have never been integrated on the plastic foils using printing method yet because the electrical fluctuation of fully printed TFTs and diodes on plastic foils could not be controlled to show the function of desired devices. In this work, fully gravure printing process in printing 13.56 MHz operated 32 bit RFID tags on plastic foils has been demonstrated for the first time to prove all printed RFID tags on plastic foils can wirelessly generate and transfer 32 bit digital codes using the radio frequency of 13.56 MHz. This result proved that the electrical fluctuations of printed TFTs and diodes on plastic foils should be controlled in the range of maximum 20% to properly operate 32 bit RFID tags.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.473-473
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• 2011

In recent years, organic thin film transistors OTFTs based on conductive-conjugated molecules have received significant attention. We report a fabrication of organic single crystal nanowires that made on Si substrates by liquid bridge-mediated nanotransfer molding (LB-nTM) with polyurethane acrylate (PUA) mold. LB-nTM is based on the direct transfer of various materials from a stamp to a substrate via a liquid bridge between them. In liquid bridge-transfer process, the liquid layer serves as an adhesion layer to provide good conformal contact and form covalent bonding between the organic single crystal nanowire and the Si substrate. Pentacene is the most promising organic semiconductors. However pentacene has insolubility in organic solvents so pentacene OTFTs can be achieved with vacuum evaporation system. However 6, 13-bis (triisopropylsilylethynyl) (TIPS) pentacene has high solubility in organic solvent that reported by Anthony et al. Furthermore, the substituted rings in TIPS-pentacene interrupt the herringbone packing, which leads to cofacial ${\pi}-{\pi}$ stacking. The patterned TIPS-Pentacene single crystal nanowires have been investigated by Atomic force microscopy (AFM), Transmission Electron Microscopy (TEM), X-Ray Diffraction (XRD), Scanning Electron Microscopy (SEM) and electrical properties.

• 한국표면공학회지
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• 제43권1호
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• pp.7-11
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• 2010

Solid phase crystallization (SPC) is a simple method in producing a polycrystalline phase by annealing amorphous silicon (a-Si) in a furnace environment. Main motivation of the crystallization technique is to fabricate low temperature polycrystalline silicon thin film transistors (LTPS-TFTs) on a thermally susceptible glass substrate. Studies on SPC have been naturally focused to the low temperature regime. Recently, fabrication of polycrystalline silicon (poly-Si) TFT circuits from a high temperature polycrystalline silicon process on steel foil substrates was reported. Solid phase crystallization of a-Si films proceeds by nucleation and growth. After nucleation polycrystalline phase is propagated via twin mediated growth mechanism. Elliptically shaped grains, therefore, contain intra-granular defects such as micro-twins. Both the intra-granular and the inter-granular defects reflect the crystallinity of SPC poly-Si. Crystallinity and SPC kinetics of high temperatures were compared to those of low temperatures using Raman analysis newly proposed in this study.

• ETRI Journal
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• 제31권6호
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• pp.647-652
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• 2009

Solution-processable organic semiconductors have been investigated not only for flexible and large-area electronics but also in the field of biotechnology. In this paper, we report the design and fabrication of biosensors based on completely organic thin-film transistors (OTFTs). The active material of the OTFTs is poly(9,9-dioctylfluorene-co-bithiophene) (F8T2) polymer functionalized with biotin hydrazide. The relationship between the chemoresistive change and the binding of avidin-biotin moieties in the polymer is observed in the output and on/off characteristics of the OTFTs. The exposure of the OTFTs to avidin causes a lowering of ID at $V_D$ = -40 V and $V_G$ = -40 V of nearly five orders of magnitude.

• 대한전자공학회논문지SD
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• 제43권6호
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• pp.1-8
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• 2006

본 논문에서는 OTFT를 기반으로 하는 AMOLED 디스플레이 구현을 위해 두 개의 OTFT와 하나의 캐패시터 그리고 하나의 OLED로 구성된 화소 회로를 설계하였고 그 동작을 시뮬레이션을 통하여 분석하였다. 먼저, 화소 회로를 이론적으로 설계하였고, $32\times32$ AMOLED 패널을 제작하기 위한 화소의 Layout을 설계하고 TFT W/L과 저장 캐패시터의 용량을 설계하였다. 그리고 설계된 화소 회로의 전기적 특성을 분석하기 위해 HSPICE 시뮬레이션 하였다 시뮬레이션 결과 OTFT 기반의 AMOLED 구현 가능성을 확인하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.998-1001
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• 2009

A new flexible TFT backplane structure with improved mechanical reliability is proposed. Amorphous indium-gallium-zinc-oxide (a-IGZO) thin film transistors based on this structure have been fabricated on a polyimide substrate, and the resultant mechanical durability has been evaluated in a cyclic bending test. The panel can withstand 10,000 bending cycles at a bending radius of 5 mm without any noticeable TFT degradation. After 10K bending cycles, the change of threshold voltage, mobility, sub-threshold slope, and gate leakage current were only -0.22V, -0.13$cm^2$/V-s, -0.05V/decade, and $-3.05{\times}10^{-13}A$, respectively.

• ETRI Journal
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• 제35권4호
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• pp.734-737
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• 2013

Nonvolatile ferroelectric poly(vinylidene fluoride-co-trifluoroethylene) memory based on an organic thin-film transistor with inkjet-printed dodecyl-substituted thienylenevinylene-thiophene copolymer (PC12TV12T) as the active layer is developed. The memory window is 4.5 V with a gate voltage sweep of -12.5 V to 12.5 V. The field effect mobility, on/off ratio, and gate leakage current are 0.1 $cm^2/Vs$, $10^5$, and $10^{-10}$ A, respectively. Although the retention behaviors should be improved and optimized, the obtained characteristics are very promising for future flexible electronics.