• Title/Summary/Keyword: thermal stress device

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The Effect of Substrate Surface Roughness on In-Situ Intrinsic Stress Behavior in Cu Thin Films (기판 표면 조도에 따른 구리박막의 실시간 고유응력 거동)

  • Cho, Moohyun;Hwang, Seulgi;Ryu, Sang;Kim, Youngman
    • Korean Journal of Metals and Materials
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    • v.47 no.8
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    • pp.466-473
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    • 2009
  • Our group previously observed the intrinsic stress evolution of Cu thin films during deposition by changing the deposition rate. Intrinsic stress of Cu thin films, which show Volmer-Weber growth, is reported to display three unique stress stages, initial compressive, broad tensile, and incremental compressive stress. The mechanisms of the initial compressive stress and incremental compressive stages remain subjects of debate, despite intensive research inquiries. The tensile stress stage may be related to volume contraction through grain growth and coalescence to reduce over-accumulate Cu adatoms on the film surface. The in-situ intrinsic stresses behavior in Cu thin films was investigated in the present study using a multi-beam curvature measurement system attached to a thermal evaporation device. The effect of substrate surface roughness was monitored by observed the in-situ intrinsic stress behavior in Cu thin films during deposition, using $100{\mu}m$ thick Si(111) wafer substrates with three different levels of surface roughness.

Effect of Pulse Width Modulation Methods on Power Losses and Thermal Loadings of Single-Phase 5-Level NPC Inverters for PV Systems (전압 변조 방법에 따른 단상 5-레벨 NPC 태양광 인버터의 전력 손실 및 열 부하 분석)

  • Ryu, Taerim;Choi, Ui-Min
    • The Transactions of the Korean Institute of Power Electronics
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    • v.27 no.1
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    • pp.56-62
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    • 2022
  • In this paper, the effect of pulse width modulation methods on thermal loadings and power losses of single-phase five-level NPC inverters for photovoltaic systems are analyzed. The pulse width modulation methods affect the power losses of the NPC inverters and thus lead to different thermal loadings of NPC inverters. To identify the reliability-critical power device with respect to thermal stress, the thermal loadings of I- and T-type NPC inverters are analyzed by applying the unipolar pulse modulation method. Then, the effect of the discontinuous pulse width modulation method on power losses and thermal loadings of power devices of I- and T-type NPC inverters are analyzed. Finally, the operation of NPC inverters applying the discontinuous pulse modulation method is confirmed by experiments. The results show that the discontinuous pulse modulation method is able to improve the reliability of NPC inverters by reducing thermal loadings of reliability-critical power devices and it is more effective for T-type NPC inverters than I-type NPC inverters.

The effect of irradiation on the wear out of thin oxide film (얇은 산화막의 wear out에 관한 광 조사 효과)

  • Kim, Jae-Ho;Choi, Bok-Kil;Sung, Yung-Kwon
    • Proceedings of the KIEE Conference
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    • 1989.11a
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    • pp.114-118
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    • 1989
  • Due to the increased integration density of VLSI circuits a highly reliable thin oxide film is required to fabricate a small geometry MOS device. The behavior of thermal $SiO_2$ under high electric field and current condition has a major effect on MOS device degration and also the practical use of MOS device under irradiation has cause the degration of thin oxide films. In this paper, in order to evaluate the reliability of thin oxides with no stress applied and stressed by the irradiation under low electric field, the tests of TDDB (Time-dependent-dielectric breakdown) are used. Failure times against electric field are examined and acceleration factor is obtained for each case. Based on the experimental data, breakdown wear out limitation for thin oxide films is characterised.

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Reflection and refraction of magneto-thermoelastic plane wave at the pre-stressed liquid-solid interface in generalized thermoelasticity under three theories

  • Kakar, Rajneesh;Kakar, Shikha
    • Earthquakes and Structures
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    • v.9 no.3
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    • pp.577-601
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    • 2015
  • The thermomagnetic effect on plane wave propagation at the liquid-solid interface with nonclassical thermoelasticity is investigated. It is assumed that liquid-solid half-space is under initial stress. Numerical computations are performed for the developed amplitude ratios of P, SV and thermal waves under Cattaneo-Lord-Shulman theory, Green-Lindsay theory and classical thermoelasticity. The system of developed equations is solved by the application of the MATLAB software at different angles of incidence for Green and Lindsay model. The effect of initial stress and magnetic field in the lower half-space are discussed and comparison is made in LS, GL and CT models of thermoelasticity. In the absence of magnetic field, the obtained results are in agreement with the same results obtained by the relevant authors. This study would be useful for magneto-thermoelastic acoustic device field.

Eletrostatic Discharge Effects on AlGaN/GaN High Electron Mobility Transistor on Sapphire Substrate (사파이어 기판을 사용한 AlGaN/GaN 고 전자이동도 트랜지스터의 정전기 방전 효과)

  • Ha Min-Woo;Lee Seung-Chul;Han Min-Koo;Choi Young-Hwan
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.54 no.3
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    • pp.109-113
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    • 2005
  • It has been reported that the failure phenomenon and variation of electrical characteristic due to the effect of electrostatic discharge(ESD) in silicon devices. But we had fess reports about the phenomenon due to the ESD in the compound semiconductors. So there are a lot of difficulty to the phenomenon analysis and to select the protection method of main circuits or the devices. It has not been reported that the relation between the ESD stress and GaN devices, which is remarkable to apply the operation in high temperature and high voltage due to the superior material characteristic. We studied that the characteristic variation of the AlGaN/GaN HEMT current, the leakage current, the transconductance(gm) and the failure phenomenon of device due to the ESD stress. We have applied the ESD stress by transmission line pulse(TLP) method, which is widely used in ESD stress experiments, and observed the variation of the electrical characteristic before and after applying the ESD stress. The on-current trended to increase after applying the ESD stress. The leakage current and transconductance were changed slightly. The failure point of device was mainly located in middle and edge sides of the gate, was considered the increase of temperature due to a leakage current. The GaN devices have poor thermal characteristic due to usage of the sapphire substrate, so it have been shown to easily fail at low voltage compared to the conventional GaAs devices.

Analysis for Thermal Distribution of Low-voltage Condenser by the Variance of Voltage & Frequency (전압 및 주파수 변화에 따른 저압 콘덴서 열 분포 해석)

  • Kim, Jong-Gyeum
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.24 no.4
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    • pp.43-49
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    • 2010
  • Power capacitor has been used to compensate for the low power factor of inductive load and to reduce harmonics generated by the power conversion device with reactor. The increase of voltage and current and thermal generation are extremely hard on the life of condenser. Current will be increased, provided that voltage and frequency of condenser increase also. The increase of voltage and frequency justly extends thermal generation. Both act on insulation stress and can afford to premature fault In this paper, we measured thermal distribution of condenser with infrared rays camera in case of variance of voltage and frequency. We were assured that the increase of voltage and frequency produces high heat and exceedingly shortens the life of condenser.

Sidewall effect in a stress induced method for Spontaneous growth of Bi nanowires

  • Kim, Hyun-Su;Ham, Jin-Hee;Lee, Woo-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.04b
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    • pp.95-95
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    • 2009
  • Single-crystalline Bi nanowires have motivated many researchers to investigate novel quasi-one-dimensional phenomena such as the wire-boundary scattering effect and quantum confinement effects due to their electron effective mass (~0.001 me). Single crystalline Bi nanowires were found to grow on as-sputtered films after thermal annealing at $270^{\circ}C$. This was facilitated by relaxation of stress between the film and the thermally oxidized Si substrate that originated from a mismatch of the thermal expansion. However, the method is known to produce relatively lower density of nanowires than that of other nanowire growth methods for device applications. In order to increase density of nanowire, we propose a method for enhancing compressive stress which is a driving force for nanowire growth. In this work, we report that the compressive stress can be controlled by modifying a substrate structure. A combination of photolithography and a reactive ion etching technique was used to fabricate patterns on a Si substrate. It was found that the nanowire density of a Bi film grown on $100{\mu}m{\times}100{\mu}m$ pattern Si substrate increased over seven times higher than that of a Bi sample grown on a normal substrate. Our results show that density of nanowire can be enhanced by sidewall effect in optimized proper pattern sizes for the Bi nanowire growth.

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A Study on the passivation of Si by Thermal Ammonia Nitroxide (Nitoxide막에 의한 표면 불활성화에 관한 연구)

  • Sung, Yung-Kwon;Choi, Jong-Il;Oh, Jae-Ha
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 1988.05a
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    • pp.78-81
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    • 1988
  • Nitroxide films were made from the $NH_3$ gas nitridation of as-grown $SiO_2$. The electrical characterization results including C-V characteristics and BT stress generally indicate that the high field stress instability and insulator-substrate interfacial characteristics are improved by nitridation of $SiO_2$. A C-V technique was used to determine the surface state density $N_{55}$ and then $N_{55}$ in the nitroxide-substrate interface was $8{\times}10(/eVcm^2$). This $N_{55}$ is related with 1/f noise was revealed experimentally and relationship was plotted and 1/f noise characteristics were also improved by nitridation of of $SiO_2$By the results of measurements on these films show that very thin thermal silicon nitroxide films can be used as gate dielectrics for future highly scaled-down VLSI device.

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Effects of passivation layer on the thermal deformation behavior of metal film used in semiconductor devices (반도체용 박막재료의 열응력-변형 특성에 미치는 passivation 층의 영향 분석)

  • Choi, Ho-Seong;Lee, Kwang-Ryol;Kwon, Dong-Il
    • Proceedings of the KIEE Conference
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    • 1998.11c
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    • pp.732-734
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    • 1998
  • Metal thin films such as aluminum have been used as interconnects in semiconductor device. Recently, these materials are applied to structural materials in microsensors and microactuators. In this study, we evaluate deformation and strength behavior of aluminum alloy film. Three layer model for thermal deformation of multilayered thin film material is introduced and applied to Si/Al(1%Si)/$SiO_2$ system. Based on beam bending theory and concept of bending strain. elastic and elastic/plastic thermal deformation behaviors of multilayered materials can be estimated. In the case of plastic deformation of ductile layer, strain rate equations based on deformation mechanism map are employed for describe the stress relaxation effect. To experimentally examine deformation of multilayered thin film materials, in-situ laser scanning method is used to measure curvature of specimens during heating and cooling. The thickness of $SiO_2$ layer is varied to estimate third-layer effect of thermal deformation of metal films, and its effect on deformation behavior are discussed.

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Effect of Underfill on $\mu$BGA Reliability ($\mu$BGA 장기신뢰성에 미치는 언더필영향)

  • 고영욱;신영의;김종민
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2002.05a
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    • pp.138-141
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    • 2002
  • There are continuous efforts in the electronics industry to a reduced electronic package size. Reducing the size of electronic packages can be achieved by a variety of means, and for ball grid array(BGA) packages an effective method is to decrease the pitch between the individual balls. Chip scale package(CSP) and BGA are now one of the major package types. However, a reduced package size has the negative effect of reducing board-level reliability. The reliability concern is for the different thermal expansion rates of the two-substrate materials and how that coefficient CTE mismatch creates added stress to the BGA solder joint when thermal cycled. The point of thermal fatigue in a solder joint is an important factor of BGA packages and knowing at how many thermal cycles can be ran before failure in the solder BGA joint is a must for designing a reliable BGA package. Reliability of the package was one of main issues and underfill was required to improve board-level reliability. By filling between die and substrate, the underfill could enhance the reliability of the device. The effect of underfill on various thermomechanical reliability issues in $\mu$BGA packages is studied in this paper.

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