• ETRI Journal
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• 제28권4호
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• pp.475-485
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• 2006

Network-on-chip (NoC) is an emerging design paradigm intended to cope with future systems-on-chips (SoCs) containing numerous built-in cores. Since NoCs have some outstanding features regarding design complexity, timing, scalability, power dissipation and so on, widespread interest in this novel paradigm is likely to grow. The test strategy is a significant factor in the practicality and feasibility of NoC-based SoCs. Among the existing test issues for NoC-based SoCs, test access mechanism architecture and test scheduling particularly dominate the overall test performance. In this paper, we propose an efficient NoC-based SoC test scheduling algorithm based on a rectangle packing approach used for current SoC tests. In order to adopt the rectangle packing solution, we designed specific methods and configurations for testing NoC-based SoCs, such as test packet routing, test pattern generation, and absorption. Furthermore, we extended and improved the proposed algorithm using multiple test clocks. Experimental results using some ITC'02 benchmark circuits show that the proposed algorithm can reduce the overall test time by up to 55%, and 20% on average compared with previous works. In addition, the computation time of the algorithm is less than one second in most cases. Consequently, we expect the proposed scheduling algorithm to be a promising and competitive method for testing NoC-based SoCs.

• 반도체디스플레이기술학회지
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• 제23권2호
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• pp.107-113
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• 2024

Scheduling of semiconductor test facilities has been crucial since effective scheduling contributes to the profits of semiconductor enterprises and enhances the quality of semiconductor products. This study aims to solve the scheduling problems for the wafer burn-in test facilities of the semiconductor back-end process by utilizing simulation and deep reinforcement learning-based methods. To solve the scheduling problem considered in this study. we propose novel state, action, and reward designs based on the Markov decision process. Furthermore, a neural network is trained by employing the recent RL-based method, named proximal policy optimization. Experimental results showed that the proposed method outperformed traditional heuristic-based scheduling techniques, achieving a higher due date compliance rate of jobs in terms of total job completion time.

• ETRI Journal
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• 제30권1호
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• pp.129-140
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• 2008

In this paper, we propose a novel ant colony optimization (ACO)-based test scheduling method for testing network-on-chip (NoC)-based systems-on-chip (SoCs), on the assumption that the test platform, including specific methods and configurations such as test packet routing, generation, and absorption, is installed. The ACO metaheuristic model, inspired by the ant's foraging behavior, can autonomously find better results by exploring more solution space. The proposed method efficiently combines the rectangle packing method with ACO and improves the scheduling results by dynamically choosing the test-access-mechanism widths for cores and changing the testing orders. The power dissipation and variable test clock mode are also considered. Experimental results using ITC'02 benchmark circuits show that the proposed algorithm can efficiently reduce overall test time. Moreover, the computation time of the algorithm is less than a few seconds in most cases.

• 인터넷정보학회논문지
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• 제6권2호
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• pp.25-35
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• 2005

실시간 스케줄링 알고리즘에서는 비율단조(RM) 스케줄링 알고리즘과 마감시한(EDF) 스케줄링 알고리즘이 가장 일반적으로 사용되고 있다. 이러한 알고리즘에서는 태스크 집합의 전체 이용율 값을 가지고 수행 가능성을 판별하였다. 그러나 임의의 태스크에서 이용율 값이 초과되면 개별 태스크의 한계성을 전혀 예측할 수 없는 문제점이 있었다. 본 논문에서 제안한 알고리즘은 이용율 값이 초과한 태스크를 예측하고, 개별 태스크의 이용율 값을 기반으로 스케줄링 가능성 여부를 판단하는 방법을 제시하였다. 또한, 실시간 시스템에서 스케줄링 가능성 검사의 한계성을 시뮬레이션을 통해 예측하고 결과를 분석하였다.

• 디지털콘텐츠학회 논문지
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• 제9권3호
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• pp.471-481
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• 2008

전력소모를 고려한 테스트 스케줄링은 회로의 복잡도가 높은 SoC 시스템을 테스트할 경우 제한된 전력 소모량 내에서 고장 검출율을 높일 수 있고 테스트 시간을 단축 할 수 있는 효과적인 방법이다. 본 논문에서는 제한된 전력소모량 내에서 효율적으로 테스트를 수행하기 위한 테스트 자원의 모델링 방법 및 테스트 스케줄링 알고리듬을 제안하고 그 유효성을 검증한다. 테스트 자원의 모델링 방법으로는 전력사용량의 최고점과 차고점을 이용한 방법 및 소모 전력의 변화량에 따라 테스트 자원을 분할하는 방법을 제시한다. 또한 테스트 자원과 코어의 상관관계를 이용하여 동시 사용가능한 최대 코어 수를 생성하는 확장나무성장 그래프 생성 알고리듬 및 전력의 최적화가 가능한 전력 소모량 변이 그래프 생성 알고리듬으로 구성된 휴리스틱(heuristic) 테스트 스케줄링 알고리듬을 제안하고 이전의 알고리듬과 비교한다.

• Journal of Electrical Engineering and information Science
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• 제3권3호
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• pp.396-401
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• 1998

An optimal algorithm is presented for feasibility test and scheduling of real-time tasks where tasks are preemptable and created dynamically. Each task has an arbitrary creation time, ready time, maximum execution time, and deadline. Feasibility test and scheduling are conducted via the same algorithm. Time complexity of the algorithm is O(n) for each newly created task where n is the number of tasks. This result improves the previous result of O(n log n). It is shown that the algorithm can be used for scheduling tasks with different levels of importance. Time complexity of the algorithm for the problem is O(n\ulcorner) which improves the previous results of O(n\ulcorner log n).

• 산업경영시스템학회지
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• 제30권1호
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• pp.59-65
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• 2007

HPI (High-speed Portable Internet) system which provides high speed internet services is going to be commercialized soon. Since HPI provides simultaneously four different service types such as UGS (Unsolicited Grant Service), rtPS (real time Polling Service), nrtPS(non-real time Polling Service), and BE (Best Effort) under different QoS (Quality of Service) requirements and limited wireless channel resources, efficient packet scheduling mechanisms are necessary to increase the utilization of channels as well as to satisfy the various QoS requirements. This study regards the traffic data to be served as time series and proposes a new packet scheduling algorithm based on the nonparametric statistical test. The performance of the newly proposed algorithm is evaluated through the simulation analysis using a simulator that can evaluate the performance of packet scheduling mechanisms under various values of system parameters and measures such as packet delay time, data transmission rate, number of loss packets, and channel utilization.

• 대한산업공학회지
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• 제35권1호
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• pp.15-39
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• 2009

Advanced planning and scheduling (APS) refers to a manufacturing management process by which raw materials and production capacity are optimally allocated to meet demand. APS is especially well-suited to environments where simpler planning methods cannot adequately address complex trade-offs between competing priorities. However, most scheduling problems of APS in the real world face both inevitable constraints such as due date, capability, transportation cost, set up cost and available resources. In this survey paper, we address three crucial issues in APS, including basic scheduling model, job-shop scheduling (JSP), assembly line balancing (ALB) model, and integrated scheduling models for manufacturing and logistics. Several evolutionary algorithms which adapt to the problems are surveyed and proposed; some test instances based on the practical problems demonstrate the effectiveness and efficiency of evolutionary approaches.

• 대한안전경영과학회지
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• 제25권2호
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• pp.1-8
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• 2023

This paper is proposing a novel machine scheduling model for the unrelated parallel machine scheduling problem without setup times to minimize the total completion time, also known as "makespan". This problem is a NP-complete problem, and to date, most approaches for real-life situations are based on the operator's experience or simple heuristics. The new model based on the Memetic Algorithm, which was proposed by P. Moscato in 1989, is a hybrid algorithm that includes genetic algorithm and local search optimization. The new model is tested on randomly generated datasets, and is compared to optimal solution, and four scheduling models; three rule-based heuristic algorithms, and a genetic algorithm based scheduling model from literature; the test results show that the new model performed better than scheduling models from literature.

• 대한전자공학회논문지SD
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• 제41권3호
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• pp.93-100
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• 2004

시스템 온 칩의 테스트 스케줄링은 제한된 전력 사용량 내에서 테스트 시간을 최소화하기 위한 방법들 가운데 하나로서 매우 중요하다. 본 논문에서는 테스트 자원들을 선택하여 그룹화하고 코어 기반 시스템 온 칩 전체 전력소비량을 고려하면서 테스트 시간과 전력소모량의 곱의 크기에 기초하여 이들을 배열하여 스케줄링 하는 휴리스틱 알고리듬을 제안한다. 전력소모량은 최대이면서 제한된 전력 소모량을 초과하지 않는 테스트 자원 그룹을 먼저 선택하고 테스트 자원 그룹 내 요소들의 테스트 시작 위치를 테스트 공간의 초기 위치에 배치하여 테스트 자원들의 낭비시간을 최소화한다. ITC02 벤치마크 회로를 사용한 실험을 통해 알고리듬의 유효성을 보인다.