• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.528-529
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• 2008

A new concept based on sample current measurements for detecting of via-hole defects on wafer has been performed by low energy electron beam microcolumn. The microcolumn has been operated at a low voltage of 290 eV with total emission current of 400 nA, and a sample current of 6 nA. The test sample was fabricated with SiO2 layer of 300 nm thickness on a piece of a silicon substrate. Preliminary results of both sample current method and secondary electron method show microcolumn and its control can be useful technology for detecting of via-hole defects on wafer.

• Journal of the Korean institute of surface engineering
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• v.33 no.2
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• pp.101-106
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• 2000

SOI (Silicon-On-Insulator) substrates were fabricated with varying annealing temperature of $25-660^{\circ}C$ by a linear annealing method, which was modified RTA process using a linear shape heat source. The annealing method was applied to Si ∥ $SiO_2$/Si pair pre-contacted at room temperature after wet cleaning process. The bonding strength of SOI substrates was measured by two methods of Razor-blade crack opening and direct tensile test. The fractured surfaces after direct tensile test were also investigated by the optical microscope as well as $\alpha$-STEP gauge. The interface bonding energy was 1140mJ/m$^2$ at the annealing temperature of $430^{\circ}C$. The fracture strength was about 21MPa at the temperature of $430^{\circ}C$. These mechanical properties were not reported with the conventional furnace annealing or rapid thermal annealing method at the temperature below $500^{\circ}C$. Our results imply that the bonded wafer pair could endure CMP (Chemo-Mechanical Polishing) or Lapping process without debonding, fracture or dopant redistribution.

• Journal of the Korean institute of surface engineering
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• v.34 no.5
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• pp.421-428
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• 2001

New WC-CrN superlattice film was deposited on Si substrate (500$\mu\textrm{m}$) using cathodic arc ion plating system. The microstructure and mechanical properties of the film depend on the superlattice period (λ). In the X-ray diffraction analysis (XRD), preferred orientation of microstructure was changed according to various superlattice periods(λ). During the Transmission Electron Microscope analysis (TEM), microstructure and superlattice period (λ) of the WC - CrN superlattice film was confirmed. Hardness and adhesion of the deposited film was evaluated by nanoindentation test and scratch test, respectively. As a result of nanoindentation test, the hardness of WC - CrN superlattice film was gained about 40GPa at superlattice period (λ) with 7nm. Also residual stress with various superlattice period (λ) was measured on Si wafer (100$\mu\textrm{m}$) by conventional beam-bending technique. The residual stress of the film was reduced to a value of 0.2 GPa by introducing Ti - WC buffer layers periodically with a thickness ratio ($t_{buffer}$/$t_{buffer+superlattice}$ ). To the end, for the evaluation of oxidation resistance at the elevated temperature, CrN single layer and WC - CrN superlattice films with various superlattice periods on SKD61 substrate was measured and compared with the oxidation resistance.

• Proceedings of the Korean Society for Technology of Plasticity Conference
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• 2004.05a
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• pp.152-155
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• 2004

Effects of sliding speed, applied load, counterpart radius and thickness of PMMA (Poly Methyl Methacrylate) coating layers on their dry sliding frictional and wear behavior were investigated. Sliding wear tests were carried out using a pin-on-disk wear tester. The PMMA layer was coated on Si wafer by a sol-gel technique with two different thicknesses, $1.5{\mu}m\;and\;0.8{\mu}m$. AISI 52100 bearing steel balls were used as a counterpart of the PMMA coating during the wear. Normal applied load and sliding speed were varied. Wear mechanisms were investigated by examining worn surfaces by an SEM. Under most of sliding test conditions, the thicker layer with the thickness of $1.5{\mu}m$ showed lower fiction coefficient than the thinner layer. Effects of sliding speed and counterpart's radius on the frictional behavior were varied depending on the thickness of the coating layer.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.18 no.3
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• pp.206-211
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• 2005

The device makers want to make higher density chips on the wafer through scale-down. The change of WSix/poly-Si gate film thickness is one of the key issues under 100 nm device structure. As a new device etching process is applied, end point detection(EPD) time delay was occurred in DPS+ poly chamber of Applied Materials. This is a barrier of device shrink because EPD time delay made physical damage on the surface of gate oxide. To investigate the EPD time delay, the experimental test combined with OES(Optical Emission Spectroscopy) and SEM(Scanning Electron Microscopy) was performed using patterned wafers. As a result, a EPD delay time is reduced by a new chamber seasoning and a new wavelength line through plasma scan. Applying a new wavelength of 252 nm makes it successful to call corrected EPD in WSix/poly-Si stack-down gate etching in the DPS+ poly chamber for the current and next generation devices.

• Journal of Sensor Science and Technology
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• v.23 no.5
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• pp.326-331
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• 2014

In this study, a MEMS microphone that uses $Si_3N_4$ as the vibration membrane was produced for application as an auditory device using a sound visualization technique (sound visualization) for the hearing impaired. Two sheets of 6-inch silicon wafer were each fabricated into a vibration membrane and back plate, after which, wafer bonding was performed. A certain amount of charge was created between the bonded vibration membrane and the back plate electrodes, and a MEMS microphone that functioned through the capacitive method that uses change in such charge was fabricated. In order to evaluate the characteristics of the prepared MEMS microphone, the frequency flatness, frequency response, properties of phase between samples, and directivity according to the direction of sound source were analyzed. The MEMS microphone showed excellent flatness per frequency in the audio frequency (100 Hz-10 kHz) and a high response of at least -42 dB (sound pressure level). Further, a stable differential phase between the samples of within -3 dB was observed between 100 Hz-6 kHz. In particular, excellent omnidirectional properties were demonstrated in the frequency range of 125 Hz-4 kHz.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.59-59
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• 2009

The efficiency of CMOS technology has been developed in uniform rate. However, there was a limitation of reducing the thickness of Gate-oxide since the thickness of Gate Dielectric is also reduced so an amount of leakage current is grow. In order to solve this problem, the semiconductor device which has a dual gate is used widely. This paper presents a method and a necessity for making the Gate Stack of TFT. Before Using test devices to measure values, stacking $SiN_x$ on a wafer test was conducted.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2004.11a
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• pp.301-305
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• 2004

Effects of ion implantation on the adhesion strength of DLC film as a function of ion doses and implanted energies were investigated. Ti ions were implanted on the Si-wafer substrates followed by DLC coating using ion beam deposition method. Adhesion strength of DLC films were determined by scratch adhesion tester. Morphologies and compositional variations at the different ion energies and doses were observer by Laser Microscope and Auger Electron Spectroscopy, respectively. From results of scratch test, the adhesion strength of films was improved as increasing ion implanted energy, however there was no significant evidence with ion dose.

• Journal of the Korean Vacuum Society
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• v.2 no.4
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• pp.416-423
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• 1993

Hydrogen depth profiling was performed by H(19F, $\alpha$${\gamma}$) nuclear resonance reactin . A cesium sputtering ion sorce and 1.7MV Tandem Van de Graaff accelerator was used for the production of 6.5MeV 19F ion. The ${\gamma}$ rays produced by the reaction were measure dby 3" $\times$3" and 6" $\times$8" Nal detectors . A test measurement was done for hydrogen contaminatin layer of a bare silicon wafer, Si3N4(H) and Zr(O)a-Si/Si for the purpose of verifying the applicability , detection limit and the reliability of the method.ility of the method.

• Journal of the Korean Society of Safety
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• v.30 no.1
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• pp.21-27
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• 2015

In this study, interfacial characteristics between SOFC and Ag paste as current collector was estimated in the high temperature environment. The Ag paste was used to connect the unit cell of SOFC strongly with interconnector and provide the electrical conductivity between them. To confirm electrical conductivity, Ag paste was treated in the furnace at $800^{\circ}C$ for 48 hours. The sheet resistance of Ag paste was measured to compare the resistance values before and after the heat treatment. Also, the four-point bending test was performed to measure the interfacial adhesion. The unit cell of SOFC and $SiO_2$ wafer were diced and then attached by Ag paste. The $SiO_2$ wafer had the center notch to initiate a crack from the tip of the notch. The modified stereomicroscope combined with the CCD camera and system for measuring the length was used to observe the fracture behavior. To compare the characteristics before heat treatment and after heat treatment, the specimen was exposed in the furnace at $800^{\circ}C$ for 48 hours and then the interfacial adhesion was evaluated. Finally, the interfacial adhesion energy quantitatively increases $1.78{\pm}0.07J/m^2$ to $4.9{\pm}0.87J/m^2$ between the cathode and Ag paste and also increase $2.9{\pm}0.47J/m^2$ to $5.12{\pm}1.01J/m^2$ between the anode and Ag paste through the high temperature. Therefore, it is expected that Ag paste as current collector was appropriate for improving the structural stability in the stacked SOFC system if the electrical conductivity was more increased.