• 대한전기학회논문지:시스템및제어부문D
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• 제55권8호
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• pp.353-362
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• 2006

This paper illustrates the practical design procedure on a position control of an electrical fin actuator for the guided missile using Time Delay Control(TDC) and Enhanced Time Delay Observer(ETDO). Since TDC is robust to the model uncertainties such as the parameter variation and the external disturbance, it has been frequently used in nonlinear control systems. For a position control of an electrical fin actuator in the missile system, TDC requires the velocity sensor as well as the position sensor. To resolve the problems of the cost, the space and the malfunction due to the velocity sensor, ETDO is used as the velocity observer. ETDO is enhanced version of TDO that has the problems of the reconstruction errors and the restriction on selecting its gains. To maximize the control performance, the parameters of ETDO are optimized by using the genetic algorithm. The effectiveness of this approach is proved through a series of simulation studies and experiments, and the designed controller is compared with the typical TDC and TDC using the reduced oder observer.

• Journal of Advanced Marine Engineering and Technology
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• 제32권3호
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• pp.430-436
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• 2008

Recently, there are many cases to use a ship's engine performance analyzer(SEPA) to measure pressure in cylinder and top dead center(TDC) of piston of engine, and analyze its performance such as fuel injection time and horsepower as well as wear of piston ring. But, SEPA needs TDC pulses($T(1){\sim}T(n)$) generated when pistons of engine are located to the TDC position ($TDC(1){\sim}TDC(n)$), these pulses are gathered from sensors connected to gear wheel of the propeller shaft in the remote distance from the measurement point. Therefore, operators need a long wire cable(WRC) to TDC detecting sensor to get these pulses, but this method is a very uncomfortable and expensive in case of installation, and it might decrease user's purchase desire. In this paper, we design and fabricate a small and inexpensive MODEM cable(M0C) so that it may be available to transmit TDC pulse generated from sensor in propeller shaft through existing power line. We also verify the facts that this MOC can be applied to SEPA and the effectiveness of the system through the experiments.

• 한국치위생학회지
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• 제14권2호
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• pp.147-154
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• 2014

Objectives : The purpose of the study is to identify the efficiency of total dental care(TDC) internship program. Methods : Dental hygiene students participated in the total dental care(TDC) internship program for 4 weeks in dental clinics practice. A self-reported questionnaire was filled out from June to July in 2012. The questionnaire consisted of oral health condition and dental care services by the students, dentists, and dental hygienists after TDC internship program. Results : Satisfaction degree of the students was $3.92{\pm}0.68$ points. The patients satisfied with TDC internship program and it was helpful to their dental health care(4.0 points). There were significant changes in tooth brushing method, frequency and O'Leary plaque index. Satisfaction degree of the dentists was 4.09 points and that of the dental hygienists was 3.80 points. Conclusions : TDC internship program is very helpful for the students not only to play an outstanding role in their dental care activities after employment but also to establish the real identity of the dental hygienist.

• 대한전자공학회논문지SD
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• 제47권5호
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• pp.87-93
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• 2010

본 논문에서는 디지털 위상동기루프에서 사용하는 고해상도와 넓은 입력 범위를 가지는 2 단계 시간-디지털 변환기(TDC)구조를 제안한다. 디지털 위상동기루프에서 디지털 오실레이터의 출력 주파수와 기준 주파수와의 위상 차이를 비교하는데 사용하는 TDC는 고해상도로 구현되어야 위상고정루프의 잡음 특성을 좋게 한다. 기존의 TDC의 구조는 인버터로 구성된 지연 라인으로 이루어져 있어 그 해상도는 지연 라인을 구성하는 인버터의 지연 시간에 의해 결정되며, 이는 트랜지스터의 크기에 의해 결정된다. 따라서 특정 공정상에서 TDC의 해상도는 어느 값 이상으로 높일 수 없는 문제점이 있다. 본 논문에서는 인버터보다 작은 값의 지연 시간을 구현하기 위해 위상-인터폴레이션 기법을 사용하였으며, 시간 증폭기를 사용하여 작은 지연 시간을 큰 값으로 증폭하여 다시 TDC에 입력하는 2 단계로 구성하여 고해상도의 TDC를 설계하였다. 시간 증폭기의 이득에 영향을 주는 두 입력의 시간 차이를 작은 값으로 구현하기 위해 지연 시간이 다른 두 인버터의 차이를 이용하여 매우 작은 값의 시간 차이를 구현하여 시간증폭기의 성능을 높였다. 제안하는 TDC는 $0.13{\mu}m$ CMOS 공정으로 설계 되었으며 전체 면적은 $800{\mu}m{\times}850{\mu}m$이다. 1.2 V의 공급전압에서 12 mA의 전류를 사용하며 0.357 ps의 해상도와 200 ps의 입력 범위를 가진다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2007년도 하계종합학술대회 논문집
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• pp.223-224
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• 2007

To develop nuclear measurement system with characteristics including both re-configuration and multi-functions, we proposed a field programmable gate array (FPGA) technique to implement TDC which is more suitable for high energy Physics system. In TDC scheme, the timing resolution is more important than the count rates of channel. In order to manage pico-second resolution TDC, we used the delay components of FPGA, utilized the place and route (P&R) delay difference, and then got two ring oscillators. By setting P&R area constraints, we generated two precise ring oscillators with slightly different frequencies. Finally, we evaluated that the period difference of these two ring oscillators was about 60 pico-seconds, timing resolution of TDC.

• 대한기계학회논문집A
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• 제26권6호
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• pp.1035-1046
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• 2002

Time Delay Control(TDC) is a robust nonlinear control scheme using Time Delay Estimation(TDE) and also has a simple structure. To apply TDC to a real system, we must design Time Delay Controller to guarantee stability. The earlier research stated sufficient stability condition of TDC for general plants. In that research, it was assumed that time delay is infinitely small. But, it is impossible to implement infinitely small time delay in a real system. So, in this research we propose a new sufficient stability condition of TDC for general plants with finite time delay. And the simulation results indicate that the previous sufficient stability condition does not work even for small time delay, while our proposed condition works well.

• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 춘계학술대회 논문집
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• pp.1120-1124
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• 2005

We reviewed controllers with a time delay estimation in this paper. Time delay control (TDC) and sliding mode control (SMC) are well known robust control schemes. Basically, the TDC has a main characteristic called a time delay estimation from which we can estimate the total uncertainty of a system. . The TDC causes the stick-slip in the case of systems with a friction. The so-called TDCSA which are short for TDC with switching action was developed to reduce the stick-slip. The TDC has the additional switching action term in the TDC structure. In the other hand, the SMC dose not have a time delay estimation but instead it can estimate the system uncertainty through the switching action. The SMC has a difficulty to estimate the total uncertainty of a system because it does not have a time delay estimation. In order to solve the difficulty, some control schemes were developed. Among them, we need to focus our attention on two control schemes: SMCPE and SMCTE, which are short for sliding mode control with a perturbation estimation and sliding mode control with a time delay estimation, respectively. In this paper, we analyzed and compared the characteristic of above three controllers. Even though the motives for the development of three control schemes are different, three control schemes have much in common in terms of their controller structures.

• 드라이브 ㆍ 컨트롤
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• 제17권1호
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• pp.44-50
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• 2020

For the requirement of accurate tracking control and the safety of physical human-robot interaction, torque control is basically desirable for humanoid robots. Because of the complexity of humanoid robot dynamics, the TDC (time-delay control) is practical because it does not require a dynamic model. However, there occurs a considerable error due to discontinuous non-linearities. To solve this problem, the TDC-FLC (fuzzy logic compensator) is applied to humanoid robots. The applied controller contains three factors: a TDE (time-delay estimation) factor, a desired error dynamic factor, and FLC to suppress the TDE error. The TDC-FLC is easy to execute because it does not require complicated humanoid dynamic calculations and the heuristic fuzzy control rules are intuitive. TDC-FLC is implemented on the whole body of a humanoid, not on biped legs even though it is performed by a virtual humanoid robot. The simulation results show the validity of the TDC-FLC for humanoid robots.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권3호
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• pp.334-341
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• 2015

This research outlines the design of a HR-TDC (High Resolution Time-to-Digital Converter) for high data rate communication systems using a $0.18{\mu}m$ CMOS process. The coarse-fine architecture has been adopted to improve the resolution of the TDC. A two-stage vernier time amplifier (2S-VTA) was used to amplify the time residue, and the gain of the 2S-VTA was larger than 64. The error during time amplification was compensated using two FTDCs (Fine-TDC) with their outputs. The resolution of the HR-TDC was 0.15 ps with a 12-bit output and the power consumption was 4.32 mW with a 1.8-V supply voltage.

• JSTS:Journal of Semiconductor Technology and Science
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• 제13권2호
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• pp.145-151
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• 2013

In this paper, a low power, small area cyclic time-to-digital converter in All-Digital PLL for DVB-S2 application is presented. Coarse and fine TDC stages in the two-step TDC are shared to reduce the area and the current consumption maintaining the resolution since the area of the TDC is dominant in the ADPLL. It is implemented in a 0.13 ${\mu}m$ CMOS process with a die area of 0.12 $mm^2$. The power consumption is 2.4 mW at a 1.2 V supply voltage. Furthermore, the resolution and input frequency of the TDC are 5 ps and 25 MHz, respectively.