• Title/Summary/Keyword: switch cell

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A Multicast ATM Switch Architecture using Shared Bus and Shared Memory Switch (공유 버스와 공유 메모리 스위치를 이용한 멀티캐스트 ATM 스위치 구조)

  • 강행익;박영근
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.24 no.8B
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    • pp.1401-1411
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    • 1999
  • Due to the increase of multimedia services, multicasting is considered as important design factor for ATM switch. To resolve the traffic expansion problem that is occurred by multicast in multistage interconnection networks, this paper proposes the multicast switch using a high-speed bus and a shared memory switch. Since the proposed switch uses a high-speed time division bus as a connection medium and chooses a shared memory switch as a basic switch module, it provides good port scalability. The traffic arbitration scheme enables internal non-blocking. By simulation we proves a good performance in the data throughput and the cell delay.

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The Performance of Banyan Type ATM Switch using Monotonic Buffering Scheme (단조 버퍼링 방식을 이용한 Banyan형 ATM 스위치의 성능평가)

  • 김범식;우찬일;신인철
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 1997.11a
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    • pp.147-161
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    • 1997
  • In the future, the performance of B-lSDN offering the multimedia and a various service depends on the performance of switch that is the important factor consisting of network. Bufferless banyan network consisted of MIN(multistage interconnection network) selected for- the fabric of ATM switch and has a limitation of performance because of blocking. Input buffered banyan networks with FIFO(first-in first-out) buffering scheme for the reduction of blocking and the cell bypass queueing theory for the reduction of HOL(head of line) blocking were seperately compared of the performance of switch. Specially input buffered banyan networks were applied monotonic buffering scheme that was proposed. As a result of simulation, Buffered Banyan Network with cell bypass queueing theory showed better performance than FIFO type input buffered Banyan network. Monotonic increase buffering scheme showed better performance than Monotonic decrease buffering scheme.

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New Zero-Current-Transition (ZCT) Circuit Cell Without Additional Current Stress

  • Kim Chong-Eun;Choi Eun-Suk;Youn Myung-Joong;Moon Gun-Woo
    • Proceedings of the KIPE Conference
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    • 2003.07a
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    • pp.294-298
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    • 2003
  • In this paper, the new zero-current-transition (ZCT) circuit cell is proposed. The main switch is turned-off under the zero current and zero voltage condition, and there is no additional current stress and voltage stress in, the main switch and the main diode. The Auxiliary switch is turned-off under the zero voltage condition, and the main diode is turned-on under the zero voltage condition, The resonant current required to obtain the ZCT is small and regenerated to the input voltage source. The operational principles of the boost converter integrated with the proposed ZCT circuit cell is analyzed theoretically and verified by the simulation and experimental result. Index terms - zero-current-transition (ZCT), zero-current- switching (ZCS), zero-voltage-switching (ZVS)

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VLSI design of a shared multibuffer ATM Switch for throughput enhancement in multicast environments (멀티캐스트 환경에서 향상된 처리율을 갖는 공유 다중 버퍼 ATM스위치의 VLSI 설계)

  • Lee, Jong-Ick;Lee, Moon-Key
    • Proceedings of the IEEK Conference
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    • 2001.06a
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    • pp.383-386
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    • 2001
  • This paper presents a novel multicast architecture for shared multibuffer ATM switch, which is tailored for throughput enhancement in multicast environments. The address queues for multicast cells are separated from those for unicast cells to arbitrate multicast cells independently from unicast cells. Three read cycles are carried out during each cell slot and multicast cells have chances to be read from shared buffer memory(SBM) in the third read cycle provided that the shared memory is not accessed to read a unicast cell. In this architecture, maximum two cells are queued at each fabric output port per time slot and output mask choose only one cell. Extensive simulations are carried out and it shows that the proposed architecture has enhanced throughput comparing with other multicast schemes in shared multibuffer switch architecture.

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A Genetic Algorithm for Assignments of Dual Homing Cell-To-Switch under Mobile Communication Networks (이동 통신 네트워크에서의 듀얼 호밍 셀 스위치 할당을 위한 유전자 알고리듬)

  • Woo Hoon-Shik;Hwang Sun-Tae
    • Journal of Information Technology Applications and Management
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    • v.13 no.2
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    • pp.29-39
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    • 2006
  • There has been a tremendous need for dual homing cell switch assignment problems where calling volume and patterns are different at different times of the day. This problem of assigning cells to switches in the planning phase of mobile networks consists in finding an assignment plan which minimizes the communication costs taking into account some constraints such as capacity of switches. This optimization problem is known to be difficult to solve, such that heuristic methods are usually utilized to find good solutions in a reasonable amount of time. In this paper, we propose an evolutionary approach, based on the genetic algorithm paradigm, for solving this problem. Simulation results confirm the appropriateness and effectiveness of this approach which yields solutions of good quality.

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New Zero-Current-Transition (ZCT) Circuit Cell Without Additional Current Stress

  • Kim, C.E.;Park, E.S.;G.W. Moon
    • Journal of Power Electronics
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    • v.3 no.4
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    • pp.215-223
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    • 2003
  • In this paper, a new zero-current-transition (ZCT) circuit cell is proposed. The main switch is turned-off under the zero current and zero voltage condition, and there is no additional current stress and voltage stress in the main switch and the main diode, respectively. The auxiliary switch is turned-off under the zero voltage condition, and the main diode is turned-on under the zero voltage condition. The resonant current required to obtain the ZCT condition is relatively small and regenerated to the input voltage source. The operational principles of a boost converter integrated with the proposed ZCT circuit cell are analyzed and verified by the simulation and experimental results.

Design and Implementation of IPC Network using Ethernet Switch In ATM (ATM 교환기내 Ethernet Switch를 이용한 IPC망 구현)

  • 김법중;나지하;오정훈;안병준
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.255-258
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    • 2000
  • This paper presents an Interprocessor Communication Network(IPC net) in ATM switching system. In order to supply stable and independent path for processor communication, additional network i.e., Ethernet, is suggested. An Ethernet switch centered on Ethernet binds each processor into a work range. IPC net proposed in this paper assures end-to-end inter-processor connection, uniform 100Mbps Ethernet bandwidth and enhanced user cell throughput of ATM switch with minimum Ethernet supporting block integrated into ATM system

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Quasi-Shared Output Buffered Switch (준 공유 출력 버퍼형 스위치 구조)

  • 남승엽;성단근;안윤영
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.283-286
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    • 2000
  • One major drawback of conventional output buffered switches is that the speed of writing cells into output buffer should be N times faster than input link speed. This paper proposes a new output buffer switch that divides one output buffer into several buffers and virtually shares the divided buffers by using a distributor. The proposed switch makes it possible to reduce the memory speed. The proposed switch is evaluated in terms of the average cell latency compared with the input buffered switches which use the arbitration alogorithms, i.e., iSLIP or wrapped wave front arbiter(WWFA).

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Structure and Implementation of Fully Interconnected ATM Switch (Part II : About the implementation of ASIC for Switching Element and Interconnected Network of Switch) (완전 결합형 ATM 스위치 구조 및 구현 (II부 스위치 엘리먼트 ASIC화 및 스위치 네트워크 구현에 대하여))

  • 김경수;김근배;박영호;김협종
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.1
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    • pp.131-143
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    • 1996
  • In this paper, we propose the improved structure of fully interconnected ATM Switch to develop the small sized switch element and represent practical implementation of switch network. As the part II of the full study about structure and implementation of fully interconnected ATM Switch, this paper especially describes the implementation of an ATM switching element with 8 input port and 8 output port at 155 Mbits/sec each. The single board switching element is used as a basic switching block in a small sized ATm switch for ATM LAN Hub and customer access node. This switch has dedicated bus in 12 bit width(8 bit data + 4 bit control signal) at each input and output port, bit addressing and cell filtering scheme. In this paper, we propose a practical switch architecture with fully interconnected buses to implement a small-sized switch and to provide multicast function withoutany difficulty. The design of switching element has become feasible using advanced CMOS technology and Embedded Gate Array technology. And, we also represent Application Specific Integrated Circuit(ASIC) of Switch Output Multiplexing Unit(SOMU) and 12 layered Printed Circuit Board for interconnection network of switch.

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A study on the characteristic of Pockel cell Q-switch for Nd:YAG laser (Nd:YAG Laser를 위한 포켓셀 Q-스위치특성 연구)

  • Kim, Whi-Young
    • Journal of Digital Contents Society
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    • v.10 no.2
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    • pp.199-207
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    • 2009
  • The Q-switching the shutter or the different optical science element puts in within the laser light resonator and the storehouse departs from the within the resonator it loses the mortar and the reversal distribution which when is sufficient creates from within the active medium, opens the shutter instantaneously and it is to do to be made to emit with the light where the energy which is accumulated within the resonator is strong very. Like this Q-switching of laser resonator--It decreases factor increasing suddenly to make. To method of Laser Q-switching mechanical switching methods, electro-optic switching methods and switching by saturable absorber methods, acousto-optic switching method etc. 4 kind are being used on a large scale. In these people the conversion which is electric in compliance with the effect which is electrooptics is widely being used the Q-switching pulse of short pulse width because being it will be able to create. Consequently, Pockel cell where it has the quality of electrooptics effect) the Q-it is become known that it is suitable it uses with switch. From the research which it sees FET and one-chip microprocessor where it is a switching element and pulse transfomer to plan and produce pockel cell Q-switch driving gears, pulse style Nd: It applied in YAG Laser system and it investigated and researched the operating characteristic of the Q-switch. Also, the Q-switch leads and Nd where it is output: YAG with forecast in compliance with a theoretical calculation it comes to buy laser beam side politics it compared and laser beam qualities which had become Q-switching it analyzed.

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