The Journal of Korean Institute of Communications and Information Sciences (한국통신학회논문지)

The Korean Institute of Commucations and Information Sciences (한국통신학회)
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A Multicast ATM Switch Architecture using Shared Bus and Shared Memory Switch

공유 버스와 공유 메모리 스위치를 이용한 멀티캐스트 ATM 스위치 구조

  • 강행익 (LG정밀 S&C 그룹 정회원) ;
  • 박영근 (연세대학교 기계전자공학부 정회원)
  • Published : 1999.08.01
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Abstract

Due to the increase of multimedia services, multicasting is considered as important design factor for ATM switch. To resolve the traffic expansion problem that is occurred by multicast in multistage interconnection networks, this paper proposes the multicast switch using a high-speed bus and a shared memory switch. Since the proposed switch uses a high-speed time division bus as a connection medium and chooses a shared memory switch as a basic switch module, it provides good port scalability. The traffic arbitration scheme enables internal non-blocking. By simulation we proves a good performance in the data throughput and the cell delay.

멀티미디어 서비스의 증가에 따라 멀티캐스팅(Multicasting)은 ATM 스위치 디자인에 있어 중요성을 더해가고 있다. 기존의 다단 연결 구조에서 멀티캐스트에 의한 트래픽 팽창의 문제를 해결하기 위해 본 논문에서는 고속의 버스와 공유 메모리 스위치를 이용한 멀티캐스트 스위치를 제안한다. 고속의 시분할 버스를 연결 매체로 사용하며 공유 메모리 스위치를 단위 모듈로 하는 구조를 채택하여 용이한 포트 확장성을 제공한다. 트래픽 중재 기법을 사용하여 내부 블러킹을 없애며, 시뮬레이션을 통해 데이터 처리율이나 셀지연 측면에서의 스위치 성능을 확인한다.

Keywords

References

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