• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2003년도 춘계학술대회 논문집 센서 박막재료 반도체 세라믹
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• pp.261-264
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• 2003

In this paper, a disk-type piezoelectric transformer for the high power was investigated with the variation of road resistance. The diameter and thickness of a disk-type piezoelectric transformer was 45mm and 4mm, respectively. The piezoelectric ceramics was composed to PZT-PMN-PSN. The ratio of driving electrode and generating electrode is 2:1. The poling direction of driving part and generating part are the same. A voltage step-up ratio increased with increasing the load resistance, $R_L$, so it reached 60 under no road resistance. Also, the maximum efficiency of 97% was obtained.

• 반도체디스플레이기술학회지
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• 제19권4호
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• pp.18-21
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• 2020

Undetected wafer slip during the lift pin-down motion in semiconductor equipment may affect the center to edge variation, wafer warpage, and pattern misalignment in plasma equipment. Direct measuring of the amount of wafer slip inside the plasma process chamber is not feasible because of the hardware space limitation inside the plasma chamber. In this paper, we demonstrated a practice for the wafer lift pin-up and down motions with respect to the gear ratio, operating voltage, and pulse width modulation to maintain accurate wafer position using remote control linear servo motor with an experimentally designed chamber mockup. We noticed that the pin moving velocity and gear ratio are the most influencing parameters to be control, and the step-wised position control algorithm showed the most suitable for the reduction of wafer slip.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2001년도 학술대회 논문집 전문대학교육위원
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• pp.3-6
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• 2001

This paper is shows the configuration of the maximum power tracking control of Photo-voltaic and battery charge system. Up to now, the chopper system had the problem which a battery become a short life by reason of discontinuity of output current and its energy reduce. But in this paper, We propose the chopper system which maintain the successive output current and at the same time, control the maximum output location by change time-ratio using tracking of energy variation that occur because of the varied volume of insolation per a day and temperature.

• 전기학회논문지
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• 제60권3호
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• pp.544-551
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• 2011

This paper presents the circuit arrangement and effective control method of regenerative energy storage system for an electric vehicle using super-capacitors as the braking energy storage element. A bi-directional controlled current flow of the DC-DC converters with the capacitor bank is connected in parallel with battery, and is controlled so that the whole of the braking energy is effectively absorbed into the capacitors and released back to the electric motor upon acceleration. The converter needs the series-parallel switching circuit for making the best use of the series capacitors and for limiting the step-up ratio of the boost converter. The proposed methods are verified by computer simulation and experimental set-up. They are usefully applied to the electric vehicles such as green cars, electric motorcycles, bike, etc which are power- supplied by the electric batteries.

• 대한기계학회논문집B
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• 제27권8호
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• pp.1122-1133
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• 2003

Numerical characteristics of implicit upwind schemes, such as upwind ADI, line Gauss-Seidel (LGS) and point Gauss-Seidel (LU) algorithms, for Navier-Stokes equations have been investigated. Time-derivative preconditioning method was applied for efficient convergence at low Mach/Reynolds number regime as well as at large grid aspect ratios. All the algorithms were expressed in approximate factorization form and von Neumann stability analysis was performed to identify stability characteristics of the above algorithms in the presence of high grid aspect ratios. Stability analysis showed that for high aspect ratio computations, the ADI and LGS algorithms showed efficient damping effect up to moderate aspect ratio if we adopt viscous preconditioning based on min-CFL/max-VNN time-step definition. The LU algorithm, on the other hand, showed serious deterioration in stability characteristics as the grid aspect ratio increases. Computations for several practical applications also verified these results.

• Journal of Power Electronics
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• 제13권4호
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• pp.636-646
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• 2013

A single-phase tapped-inductor boost converter has been proposed previously. However, detailed characterization and performance analysis were not conducted. This paper presents a detailed characterization, performance analysis, and design expressions of a single-phase tapped-coupled-inductor boost converter. Expressions are derived for average and RMS input current as well as for RMS input and output capacitor current ripple. A systematic approach for sizing the tapped-coupled inductor, active switch, and output diode is presented; such approach has not been reported in related literature. This study reveals that sizing of the inductor has to be based on current ripple requirement, turns ratio, and load. Conditions that produce discontinuous inductor current are also discussed. Analysis of a non-ideal converter operating in continuous conduction mode is also conducted. The expression for the voltage ratio considering the coupling coefficient is derived. The suitability of the converter for high-voltage step-up applications is evaluated. Factors that affect the voltage boost ratio are also identified. The effects of duty ratio and load variation on the performance of the converter are also investigated. The theoretically derived characteristics are validated through simulations. Experimental results obtained at a low power level are included to validate the analytical and simulation results. A good agreement is observed among the analytical, simulation, and experimental results.

• Journal of Advanced Marine Engineering and Technology
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• 제41권1호
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• pp.76-82
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• 2017

최근 전자제어엔진 및 전기추진선박이 도입된 이래, 배터리를 사용하는 비상 전력공급시스템에서 무정전 전원공급장치의 중요성이 강조되어왔다. 비상 전력공급시스템에서 양방향 컨버터는 중요한 구성요소이다. 본 연구에서는 개선된 DC-DC 양방향 컨버터의 토폴로지를 제시한다. 이것은 기존의 컨버터에 비해 전압변환율은 증가되고 스위치에 인가되는 전압 스트레스는 감소되는 장점을 지닌다. 제안된 컨버터의 성능을 확인하기 위해 소프트웨어 PSIM을 사용하여 시뮬레이션을 수행하였다. 이 컨버터의 변환율은 기존의 컨버터에 비해 승압모드에서 4배, 강압모드에서 1/4배 이었고 스위치에 걸리는 전압은 고압 측의 1/4배 이었다. 또한 블로킹 커패시터가 전하를 균등하게 분배하기 때문에 다른 추가 제어회로 없이 인터리브 모듈 사이에서 전하가 균등하게 분담된다는 것을 확인하였다.

• 한국추진공학회지
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• 제3권4호
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• pp.38-43
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• 1999

본 연구는 액체 추진제 로켓 엔진의 연소성능을 평가할 수 있는 절차를 확립하고, 운동량비와 혼합비가 연소성능에 미치는 영향을 고찰하여 안정된 연소를 보장하면서 최대의 효율을 제공하는 설계조건을 결정하고자 수행되었다. 연구를 위해 질산/Kerosene을 추진제로 사용하고 추력 24 $\iota{b}_f$, 연소실 압력 200 psia, uni-element impinging streams doublet injector를 사용하는 엔진을 설계 및 제작하여 연소시험을 수행하였다. 연구로부터 점화시 발생하는 hard start 현상은 연소실 압력을 설계치의 25 % 정도가 되도록 한 후, 설계 압력으로 상승시키는 2단계 점화방법을 채택함으로서 최소화 할 수 있었다. 그리고 최대의 연소성능은 혼합비 3.6에 존재하였고, 연소성능은 운동량비 증가에 따라서 감소하였다.

• 전력전자학회논문지
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• 제18권3호
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• pp.247-255
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• 2013

In this paper, a soft switching DC-DC converter for AC module type photovoltaic (PV) module integrated converter is proposed. A push-pull converter is suitable for a low voltage PV AC module system because the step-up ratio of a high frequency transformer is high and the number of primary side switches is relatively small. However, the conventional push-pull converters do not have high efficiency because of high switching losses by hard switching and transformer losses (copper and iron losses) by high turns-ratio of the transformer. In the proposed converter, primary side switches are turned on at zero voltage switching (ZCS) condition and turned off at zero current switching (ZVS) condition through parallel resonance between secondary leakage inductance of the transformer and a resonant capacitor. Therefore the proposed push-pull converter decreases the switching loss using soft switching of the primary switches. Also, the turns-ratio of the transformer can be reduced by half using a voltage-doubler of secondary side. The theoretical analysis of the proposed converter is verified by simulation and experimental results.

• ETRI Journal
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• 제38권6호
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• pp.1240-1249
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• 2016

With the number of IP cores in a multicore system-on-chip increasing to up to tens or hundreds, the role of on-chip interconnection networks is vital. We propose a networks-on-chip-style bus network as a compromise and redefine the exploration problem to find the best IP tiling patterns and communication path combinations. Before solving the problem, we estimate the time complexity and validate the infeasibility of the solution. To reduce the time complexity, we propose two fast exploration algorithms and develop a program to implement these algorithms. The program is executed for several experiments, and the exploration time is reduced to approximately 1/22 and 7/1,200 at the first and second steps of the exploration process, respectively. However, as a trade-off for the time saving, the time cost (TC) of the searched architecture is increased to up to 4.7% and 11.2%, respectively, at each step compared with that of the architecture obtained through full-case exploration. The reduction ratio can be decreased to 1/4,000 by simultaneously applying both the algorithms even though the resulting TC is increased to up to 13.1% when compared with that obtained through full-case exploration.