• Journal of Power Electronics
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• 제19권3호
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• pp.645-654
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• 2019

In this paper, a new high step up DC/DC converter with a modified super-lift technique is presented. The coupled inductor technique is combined with the super-lift technique to provide a tenfold or more voltage gain with a proper duty cycle and a low turn ratio. Due to a high conversion ratio, the voltage stress on the semiconductor devices is reduced. As a result, low voltage ultra-fast recovery diodes and low on resistance MOSFET can be used, which improves the reverse recovery problems and conduction losses. This converter employs a passive clamp circuit to recycle the energy stored in the leakage inductance. The proposed convertor features a high conversion ratio with a low turn ratio, low voltage stress, low reverse recovery losses, omission of the inrush currents of the switch capacitor loops, high efficiency, small volume and reduced cost. This converter is suitable for renewable energy applications. The operational principle and a steady-state analysis of the proposed converter are presented in details. A 200W, 30V input, 380V output laboratory prototype circuit is implemented to confirm the theoretical analysis.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.103-103
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• 2009

In this study, in order to develop high power piezoelectric transformer, we compared the piezoelectric transformers dimension. The basic composition of piezoelectric ceramics is ternary $0.01Pb(Ni_{1/3}Nb_{2/3})O_3-0.08Pb(Mn_{1/3}Nb_{2/3})O_3-0.91Pb(Zr_{0.505}Ti_{0.495})O_3$. The voltage step up ratio of piezoelectric transformer showed the maximum value at the near of 81 kHz and increased according to the increase of load resistance.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.143-146
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• 2002

The characteristics of a multilayer piezoelectric transformer were investigated using 0.05Pb(A $l_{0.5}$N $b_{0.5}$) $O_3$-0.95Pb(Z $r_{0.52}$ $Ti_{0.48}$) $O_3$+0.9wt%N $b_2$ $O_{5}$+0.5wt%Mn $O_2$+0.04wt% $V_2$ $O_{5}$ ceramics. The multilayer piezoelectric trans formers were developed for voltage step-up. The multilayer ceramic technology was applied in piezoelectric transformer. The electrical characteristics of the piezoelectric transformer (33x8.5x1mm) has the efficiency of above 85%, step-up ratio of 70 under the 130 kΩ load, and driving frequency of 93.5kHz, respectively.ctively.y.y.

• Journal of Power Electronics
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• 제19권1호
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• pp.134-145
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• 2019

A single-phase step-up five-level inverter topology with a new phase-shifted pulse width modulation (PS-PWM) strategy is proposed in this paper. When compared with conventional single-phase five-level inverter topologies, the proposed topology can realize multilevel inversion with a double step-up ratio, a reduced number of switching devices and self-balanced capacitor voltages. When compared with the conventional PS-PWM strategy, the new PS-PWM strategy can be implemented with one carrier reduced, which makes it much easier to implement in a digital signal processor (DSP) system. Experimental results have been presented to verify the effectiveness of the proposed inverter and the PS-PWM strategy.

• 전력전자학회논문지
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• 제28권1호
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• pp.8-14
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• 2023

This paper proposes a PFC converter with a double step-up function using an asymmetrical PWM scheme. For the conventional PWM scheme, the input voltage range, which maintains a double step-up function, is limited because the proposed converter has different voltage gains and characteristics when the duty ratio(D) is less than 0.5. The proposed converter has a constant voltage gain regardless of the magnitude of the input voltage and can achieve output voltage balancing by using the asymmetrical PWM scheme. A 1.6-kW prototype of the proposed converter was built and tested to verify the performance.

• 한국전기전자재료학회논문지
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• 제19권7호
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• pp.644-649
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• 2006

This paper presents a new disk-type piezoelectric transformer. The input side of the transformer has a crescent-shaped electrode and the output side has a focused poling direction. The piezoelectric transformers operated in each transformer's resonance vibration mode. The electrodes and poling directions on commercially available piezoelectric ceramic disks were designed so that the planar or shear mode coupling factor $(k_p\;k_{15})$ becomes effective rather than the transverse mode coupling factor $(k_{31})$. ANSYS finite element code was used to analyze transformer behavior and to optimize electrode and poling configurations. The voltage step-up ratio of the proposed transformer has been markedly improved in comparison with that of the equivalent rectangular(Rosen) type. A single layer prototype transformer, $20\sim30mm$ in diameter and $1.0\sim3.5mm$ thick, was fabricated, such as step-up ratio, power transformation efficiency, and temperature were measured. While the transformer was driving a Cold Cathode Fluorescent Lamp(CCFL), the temperature field of the transformer was also observed.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 하계학술대회 논문집 C
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• pp.1490-1492
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• 2003

A new type of piezoelectric transformer using radial vibration of disk, poled with the same direction is proposed. The piezoelectric ceramics was composed to PZT-PMN-PSN. The surface ratio of driving electrode and generating electrode of the piezoelectric transformer ranges from 1.4:1 to 3:1. As a experimental result, both resonance frequency and step-up voltage ratio increased with increasing load resistance. The step-up voltage ratio was reached more than 60 times under no load resistance. The maximum efficiency of 97.7% at load resistance of 2k${\Omega}$ was obtained.

• 전력전자학회논문지
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• 제19권4호
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• pp.349-356
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• 2014

As the turns ratio of the tapped-inductor contributes to the step-up ratio, the tapped-inductor boost (TIB) converter has significantly increased level of difficulties in its analysis and design compared to the conventional boost converter where the duty ratio is the sole factor affecting the step-up ratio. In this paper, the operation of the continuous current mode TIB converter is briefly reviewed, the characteristics are analyzed in detail, and a design guideline optimizing the loss in the tapped-inductor is presented with a practical design example. Finally, experimental results from a 12V/120V prototype for 0.25A LED driver application are also presented to confirm the design.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2001년도 Proceedings ICPE 01 2001 International Conference on Power Electronics
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• pp.708-712
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• 2001

A new phase-shifted parallel-input/series-output (PI SO) dual inductor-fed push-pull converter for high-power step­up applications is proposed. This converter is operated at a constant duty cycle and employs an auxiliary circuit to control the output voltage with a phase-shift between the two modules. It features a voltage conversion characteristic which is linear to changes in the control input, and high step-up ratio with a greatly reduced switch turn-off stress resulting in a significant increase in the converter efficiency. It also shows a low ripple content and low root-mean-square (RMS) current in the output capacitor. The operational principle is analyzed and a comparative analysis with the conventional pulse-width-modulated (PWM) PISO dual inductor-fed push-pull converter is presented. A 50kHz, 800W, 350Vdc prototype with an input of 20-32Vdc has also been constructed to validate the proposed converter. The proposed converter compares favorably with the conventional counterpart and is considered well suited to high-power step-up applications.

• Journal of Electrical Engineering and Technology
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• 제12권4호
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• pp.1484-1494
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• 2017

We present a two-stage inverter with high step-up conversion ratio engaging modified finite-set Model Predictive Control (MPC) for utility-integrated photovoltaic (PV) applications. The anticipated arrangement is fit for low power PV uses, the calculated efficiency at 150 W input power and 19 times boosting ratio was around 94%. The suggested high-gain dc-dc converter based on Cockcroft-Walton multiplier constitutes the first-stage of the offered structure, due to its high step-up ability. It can boost the input voltage up to 20 times. The 3S current-source inverter constitutes the second-stage. The 3S current-source inverter hires three semiconductor switches, in which one is functioning at high-frequency and the others are operating at fundamental-frequency. The high-switching pulses are varied in the procedure of unidirectional sine-wave to engender a current coordinated with the utility-voltage. The unidirectional current is shaped into alternating current by the synchronized push-pull configuration. The MPC process are intended to control the scheme and achieve the subsequent tasks, take out the Maximum Power (MP) from the PV, step-up the PV voltage, and introduces low current with low Total Harmonic Distortion (THD) and with unity power factor with the grid voltage.