• Journal of KIISE:Software and Applications
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• v.32 no.12
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• pp.1283-1291
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• 2005

One of the problems in boosting Java performance using a Just-in-Time (JIT) compiler is removing redundant array bound checks. In conventional static compilers, many powerful algorithms have been developed, yet they are not directly applicable to JIT compilation where the compilation time is part of the whole running time. In the current JIT compilers, we tan use either a naive algorithm that is not powerful enough or an aggressive algorithm which requires the transformation into a static single assignment (SSA) form of programs (and back to the original form after optimization), thus causing too much overhead not appropriate for JIT compilation This paper proposes a new algorithm based on an inequality graph which can eliminate array bounds check codes aggressively without resorting to the SSA form. When we actually perform this type of optimization, there are many constraints in code motion caused by the precise exception rule in Java specification, which would cause the algorithm to miss many opportunities for eliminating away bound checks. We also propose a new method to overcome these constraints.

• Journal of the Korean Society of Safety
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• v.31 no.3
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• pp.42-46
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• 2016

In LCD Display or semiconductor manufacturing processes, the anti-static technology of glass substrates and wafers becomes one of the most difficult issues which influence the yield of the semiconductor manufacturing. In order to overcome the problems of wafer surface contamination various issues such as ionization in decompressed vacuum and inactive gas(i.e. $N_2$ gas, Ar gas, etc.) environment should be considered. Soft X ray radiation is adequate in air and $O_2$ gas at atmospheric pressure while UV radiation is effective in $N_2$ gas Ar gas and at reduced pressure. At this point of view, the "vacuum ultraviolet ray ionization" is one of the most suitable methods for static elimination. The vacuum ultraviolet can be categorized according to a short wavelength whose value is from 100nm to 200nm. this is also called as an Extreme Ultraviolet. Most of these vacuum ultraviolet is absorbed in various substances including the air in the atmosphere. It is absorbed substances become to transit or expose the electrons, then the ionization is initially activated. In this study, static eliminator based on the vacuum ultraviolet ray under the above mentioned environment was tested and the results show how the ionization performance based on vacuum ultraviolet ray can be optimized. These vacuum ultraviolet ray performs better in extreme atmosphere than an ordinary atmospheric environment. Neutralization capability, therefore, shows its maximum value at $10^{-1}{\sim}10^{-3}$ Torr pressure level, and than starts degrading as pressure is gradually reduced. Neutralization capability at this peak point is higher than that at reduced pressure about $10^4$ times on the atmospheric pressure and by about $10^3$ times on the inactive gas. The introductions of these technology make it possible to perfectly overcome problems caused by static electricity and to manufacture ULSI devices and LCD with high reliability.

• Proceedings of the KIPE Conference
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• 2001.10a
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• pp.561-565
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• 2001

This paper proposes a new switching scheme of a static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). To improve the un­balanced problem of the DC capacitor voltages, the rotated switching scheme of fundamental frequency is newly used. The optimized fundamental switching pattern with low switching frequency is adapted to be suitable for high application. The selective harmonic elimination method(SHEM) allows to keep the total harmonic distortion(THD) low in the output voltage of multilevel inverter. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.54 no.4
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• pp.179-184
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• 2005

This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). A new switching scheme is developed for the SVC system. To improve the unbalanced problem of the DC capacitor voltages, the rotated switching scheme of fundamental frequency is newly used. The optimized fundamental switching pattern with low switching frequency is adapted to be suitable for high application. The selective harmonic elimination method(SHEM) allows to keep the total harmonic distortion(THD) low in the output voltage of multilevel inverter. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1993.05a
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• pp.72-75
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• 1993

The characteristic of streaming electrification and static charge diminution in Cu, Fe and Sus pipes were investigated. The Cu and Fe pipes are charged positively, whereas the Sus pipes are charged negatively. Electrification rate in Cu and Fe pipes increases with increasing a pipe length for no-charged insulating oil. The electrification rate in Cu and Fe pipes abruptly increase with increasing the temperature and flow rate of insulating oil but decrease in Sus pipes. The current flows as a direction of insulating oil in all pipes.

• Proceedings of the KIEE Conference
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• 2003.07e
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• pp.144-148
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• 2003

This paper examines the application of high voltage static var compensator(SVC) with cascade multilevel inverter which employs H-bridge inverter(HBI). To improve the unbalanced problem of the DC capacitor voltages, the rotated switching scheme of fundamental frequency is newly used. The optimized fundamental switching pattern with low switching frequency is adapted to be suitable for high application. The selective harmonic elimination method(SHEM) allows to keep the total harmonic distortion(THD) low in the output voltage of multilevel inverter. The SVC system is modeled using the d-q transform which calculates the instantaneous reactive power. This model is used to design a controller and analyze the SVC system. Simulated and experimental results are also presented and discussed to validate the proposed schemes.

• Architectural research
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• v.15 no.3
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• pp.159-166
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• 2013

This study was aimed at analyzing the three-step seismic performance evaluation procedure of Korea Infrastructure Safety Cooperation and proposing a new procedure suitable for unreinforced masonry buildings in Korea. For the study, it was investigated the performance evaluation results of five example URM buildings. First of all, it was found that the performance evaluation procedure for the URM buildings should be different from that for the other structural systems. As a result, a simple procedure of seismic performance evaluation was proposed, which includes elimination of elastic and inelastic push-over analysis and reduction of performance levels and evaluation steps. With the simple procedure, the URM buildings could be evaluated more easily than the other structures. It would be expected that the procedure can provide structural engineers with a simple and easy way to evaluate the seismic performance of the Korean URM buildings. Nevertheless, the procedure must be revised continuously by reflecting new research products for the URM buildings in Korea.

• Journal of the Computational Structural Engineering Institute of Korea
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• v.20 no.1
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• pp.57-63
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• 2007

The systematic method to construct equivalent static load from a given dynamic load is proposed in the present study. Previously reported works to construct equivalent static load were based on ad hoc methods. Due to improper selection of loading position, they may results in unreliable structural design. The present study proposes the employment of primary degrees of freedom for imposing the equivalent static loads. The degrees of freedom are selected by two-level condensation scheme with reliability and efficiency. In several numerical examples, the efficiency and reliability of the proposed scheme is verified by comparison displacement for equivalent static loading and dynamic loading at the critical time.

• The KIPS Transactions:PartA
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• v.18A no.3
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• pp.109-114
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• 2011

We describe a technique for automatically proving compiler optimizations sound, meaning that their transformations are always semantics-preserving. As is well known, IR (Intermediate Representation) optimization is an important step in a compiler backend. But unfortunately, it is difficult to detect and debug the IR optimization errors for compiler developers. So, we introduce a C level error check system for detecting the correctness of these IR transformation techniques. In our system, we first create an IR-to-C converter to translate IR to C code before and after each compiler optimization phase, respectively, since our technique is based on the Memory Comparison-based Clone(MeCC) detector which is a tool of detecting semantic equivalency in C level. MeCC accepts only C codes as its input and it uses a path-sensitive semantic-based static analyzer to estimate the memory states at exit point of each procedure, and compares memory states to determine whether the procedures are equal or not. But MeCC cannot guarantee two semantic-equivalency codes always have 100% similarity or two codes with different semantics does not get the result of 100% similarity. To increase the reliability of the results, we describe a technique which comprises how to generate C codes in IR-to-C transformation phase and how to send the optimization information to MeCC to avoid the occurrence of these unexpected problems. Our methodology is illustrated by three familiar optimizations, dead code elimination, instruction scheduling and common sub-expression elimination and our experimental results show that the C level error check system is highly reliable.

• The KIPS Transactions:PartD
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• v.14D no.2
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• pp.217-224
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• 2007

In order to determine the value and type statically. CTOC uses the SSA Form which separates the variable according to assignment. The SSA Form is widely being used as the intermediate expression of the compiler for data flow analysis as well as code optimization. However, the conventional SSA Form is more associated with variables rather than expressions. Accordingly, the redundant expressions are eliminated to optimize expressions of the SSA From. This paper defines the partial redundant expression to obtain a more optimized code and also implements the technique for eliminating such expressions.