• Journal of Biosystems Engineering
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• v.33 no.6
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• pp.423-429
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• 2008

This study was performed to investigate the effects of inertial navigation system (INS) / global positioning system (GPS) sensor fusion for agricultural vehicle navigation. An extended Kalman filter algorithm was adopted for INS/GPS sensor fusion in an integrated mode, and the vehicle dynamic model was used instead of the navigation state error model. The INS/GPS system was consisted of a low-cost gyroscope, an odometer and a GPS receiver, and its performance was tested through computer simulations. When measurement noises of GPS receiver were 10, 1.0, 0.5, and 0.2 m ($1{\sigma}$), RMS position and heading errors of INS/GPS system at 5 m/s straight path were remarkably reduced with 10%, 35%, 40%, and 60% of those obtained from the GPS receiver, respectively. The decrease of position and heading errors by using INS/GPS rather than stand-alone GPS can provide more stable steering of agricultural equipments. Therefore, the low-cost INS/GPS system using the extended Kalman filter algorithm may enable the self-autonomous navigation to meet required performance like stable steering or more less position errors even in slow-speed operation.

• Smart Structures and Systems
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• v.6 no.2
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• pp.115-133
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• 2010

A modal filter is a tool used to extract the modal coordinates of each individual mode from a system's output. This is achieved by mapping the response vector from the physical space to the modal space. It decomposes the system's responses into modal coordinates, and thus, on the output of the filter, the frequency response with only one peak corresponding to the natural frequency to which the filter was tuned can be obtained. As was shown in the paper (Deraemecker and Preumont 2006), structural modification (e.g. a drop in stiffness or mass due to damage) causes the appearance of spurious peaks on the output of the modal filter. A modal filter is, therefore, a great indicator of damage detection, with such advantages as low computational effort due to data reduction, ease of automation and lack of sensitivity to environmental changes. This paper presents the application of modal filters for the detection of stiffness changes. Two experiments were conducted: the first one using the simulation data obtained from the numerical 7DOF model, and the second one on the experimental data from a laboratory stand in 4 states of damage.

• JSTS:Journal of Semiconductor Technology and Science
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• v.17 no.4
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• pp.568-576
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• 2017

This paper presents a clock and data recovery circuit with an adaptive loop bandwidth calibration scheme and the idle power saved frequency acquisition. The loop bandwidth calibration adaptively controls injection currents of the main loop with a trimmable bandgap reference circuit and trains the VCO to operate in the linear frequency control range. For stand-by power reduction of the phase detector, a clock gating circuit blocks 8-phase clock signals from the VCO and cuts off the current paths of current mode D-flip flops and latches during the frequency acquisition. 77.96% reduction has been accomplished in idle power consumption of the phase detector. In the jitter experiment, the proposed scheme reduces the jitter tolerance variation from 0.45-UI to 0.2-UI at 1-MHz as compared with the conventional circuit.

• Journal of IKEEE
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• v.14 no.3
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• pp.250-255
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• 2010

The interleaved power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. The buck-boost converter used to provide the high output voltage and low output voltage for portable applications. Also we used the PWM(Pulse Width Modulation) control method for high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The interleaved PMIC to reduce output ripple. And step-down DC-DC converter in stand-by mode below 1mA is designed with LDO in order to achive high efficiency.

• JSTS:Journal of Semiconductor Technology and Science
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• v.9 no.2
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• pp.85-90
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• 2009

This paper presents a single supply PLC SoC ASIC with a built-in analog Front-end circuit. To achieve the low power consumption along with low cost, this PLC SoC employs fully CMOS Analog Front End (AFE) and several LDO regulators (LDOs) to provide the internal power for Logic Core, DAC and Input/output Pad driver. The receiver part of the AFE consists of Pre-amplifier, Gain Amplifier and 1 bit Comparator. The transmitter part of the AFE consists of 10 bit Digital Analog Converter and Line Driver. This SoC is implemented with 0.18 ${\mu}m$ 1 Poly 5 Metal CMOS Process. The single supply voltage is 3.3 V and the internal powers are provided using LDOs. The total power consumption is below 30 mA at stand-by mode to meet the Eco-Design requirement. The die size is 3.2 $\times$ 2.8 $mm^{2}$.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.8
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• pp.1099-1106
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• 2012

Microgrid is a new electrical energy system that composed of various generators, renewable energy, batteries and loads located near the electrical customers. When Microgrid is interconnected with large power system, Microgrid don't need to control the frequency. But in case of the outage or faults of power system, Microgrid should control the frequency to prevent the shutdown of Microgrid. This paper presents the frequency control methods using the droop function, being used by synchronous generators and EMS(Energy Management System). Using droop function, two battery systems could share the load based on locally measured signals without any communications between batteries. Also, we suggest that EMS should control the controllable distributed generators as P/Q control modes except batteries to overcome the weakness of droop function. Finally we suggest the two batteries systems to prolong the battery's life time considering the economical view. The validation of proposed methods is tested using PSCAD/EMTDC simulations and field test sites at the same time.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.1
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• pp.97-104
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• 2016

Because of rapid growth of data size, the number of data storage has been increased. When using multiple data storages, a distribute file system is essential to insure the availability of data files. The power consumption is a major problem when using a distributed file system with many data storages. Previous works have aimed at reducing the energy consumption with efficient file block layout by changing some data servers into stand-by mode. The file block migration has not been seriously considered because migration causes large cost. But when we consider addition of a new data server or file, file block migration is needed. This paper formulates the minimization of data block migration as an ILP optimization problem and solves it using branch-and-bound method. Using this technique, we can maximize the number of stand-by data servers with the minimum number of file block movement. However, computation time of branch-and-bound method of an ILP optimization problem increases exponentially as the problem size grows. Therefore this paper also proposes a data block and data server grouping method to solve many small ILP problems.

• The Southeast Asian review
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• v.21 no.2
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• pp.155-182
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• 2011

The purpose of this paper is to examine the process of Islamization in Java, focusing on religious discourse among Muslim intellectuals. How Islamic tradition and knowledge have been perceived and utilized and how they have interacted with those of non-Islamic origin will be discussed. For this, three Islam-related books written in different phases of Islamization are to be analyzed: Babad Tanah Jawi compiled by Mataram court in the 17th century, Serat Cabolek written by a court poet in the late 18th or early 19th century, and Fikih Anti-korupsi published by reformist and scriptural organization of Muhammadiyah in 2006. Babad portrays conversion to Islam as a process which does not demand a dramatic outward change in religious practice. Scriptural tradition of Islam and the dichotomy between what is Islamic and what is not were not mentioned in order to explain conversion. Spiritual and mystical enlightenment was emphasized heavily, and for this, the importance of non-Islamic traditions was fully acknowledged. Serat tells us that this period was characterized by the surge of scriptural and shariah-minded Islam, maintenance of non-Islamic traditions, clashes between scriptural Islam and old religious traditions, and Javanese efforts to harmonize these. In Fikih, non-Islamic tradition is replaced by scriptural Islam and disappears totally. Interpretations based on the Scriptures, however, do not monopolize it and are used together with mode of analysis from the West. It is too much to call this 'intellectual syncretism', in that Islamic Scriptures and Western knowledge do not mix but stand side by side. Three books under examination reveal that the process of Islamization in Java has not been uniform. It has been conditioned and shaped by local socio-cultural and historical circumstances, where active engagement and intellectual exercise of Javanese Muslims have played key roles. Even Islamization in the last few decades is not an exception. The surge of scripturalism and fundamentalism does not simply bring about a move to Arabization. Interacting with local intellectual and socio-cultural milieu, this has produced a sort of intellectual hybridity, which is unique to Muslim society of Java.

• Asian Journal for Public Opinion Research
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• v.1 no.3
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• pp.153-202
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• 2014

Aside from political leaders' popularity rates and the stock exchange index of business firms, ordinary people are highly interested in aspects of daily life, such as housing, income, health, family, food, human relations and work. Cross-national opinion polls on daily-life satisfaction were carried out in Japan, South Korea, Thailand, Hong Kong, Macao, the Philippines, India, Myanmar, Taiwan, China, Malaysia and Pakistan in the fall of 2013 and winter 2014. The percent difference index (PDI) is formulated as the sum of two positive responses (satisfied and somewhat satisfied) minus the sum of two negative responses (dissatisfied and somewhat dissatisfied). Percent difference indices are given according to society and daily-life aspects. For our analysis to go beneath national average and to go beyond national borders, two lines of analysis are carried out. First, the distance between the level of satisfaction of the top and bottom quartiles is given for each society and according to each of the daily-life aspects. Second, the regional sum of satisfaction of the top quartiles and bottom quartiles are shown crossed by daily-life aspects. In this article we confine ourselves to preliminary comparative description and analysis. More solid and deep comparisons will be carried out by local polling leaders of 12 Asian societies in the succeeding issue of the Asian Journal of Public Opinion Research. Nevertheless, two key threads stand out from this preliminary comparisons. First, social relations (family and human relations) stand out as most satisfied aspects of life in most of twelve societies. Second, the need to go beneath national averages and beyond national borders in analyzing cross-national surveys is confirmed. The comparability and validity of cross-national surveys with varying sampling method and survey mode are briefly discussed toward the end of the article.

• Journal of IKEEE
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• v.12 no.3
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• pp.176-183
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• 2008

The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device is proposed in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. DTMOS with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an error amplifier and a comparator circuit as a block. The Saw-tooth generator is made to have 1.2 MHz oscillation frequency and full range of output swing from ground to supply voltage(VDD:3.3V). The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device, achieved the high efficiency near 95% at 100mA output current. And DC-DC converter is designed with LDO in stand-by mode which fewer than 1mA for high efficiency.