1 |
T. Lee, Y.-H. Kim, J. Sim, J.-S. Park, and L.-S. Kim, "A 5-Gb/s 2.67-mW/Gb/s digital clock and data recovery with hybrid dithering using a time-dithered delta-sigma modulator," IEEE Trans. Very Large Scale Integration (VLSI) Systems, vol. 24, no. 4, pp. 1450-1459, Apr. 2016.
DOI
|
2 |
S. Byun et al., "A 10-Gb/s CMOS CDR and DEMUX with IC a quarter-rate linear phase detector," IEEE J. Solid-State Circuits, vol. 41, no. 11, pp. 2566-2576, Nov. 2006.
DOI
|
3 |
J. Lee, K. S. Kundert, and B. Razavi, "Analysis and modeling of bang-bang clock and data recovery circuits," IEEE J. Solid-State Circuits, vol. 39, no. 9, pp. 1571-1580, Sep. 2004.
DOI
|
4 |
B. Razavi, Design of integrated circuits for optical communications, 1st ed., McGraw-Hill, 2003, pp. 318-322.
|
5 |
K. N. Leung, and Philip K. T. Mok, "A Sub-1-V 15-ppm/ CMOS Bandgap Voltage Reference Without Requiring Low Threshold Voltage Device," IEEE J. Solid-State Circuits, vol. 37, no. 4, pp. 526-530, Apr. 2002.
DOI
|
6 |
H. Abbasizadeh et al., "Accurate sub-1 V CMOS bandgap voltage reference with PSRR of -118 dB," IEIE J. Semiconductor Technology and Science, vol. 16, no. 4, pp. 528-533, Aug. 2016.
DOI
|
7 |
H. I. Lee et al., "A fractional-N frequency synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications," IEEE J. Solid-State Circuits, vol. 39, no. 7, pp. 1164-1169, Jul. 2004.
DOI
|
8 |
S. Kim et al., "A 1.248 Gb/s - 2.918 Gb/s low-power receiver for MIPI-DigRF M-PHY with a fast settling fully digital frequency detection Loop in 0.11 CMOS," IEIE J. Semiconductor Technology and Science, vol. 15, no. 4, pp. 506-517, Aug. 2015.
DOI
|
9 |
R. Inti et al., "A 0.5-to-2.5Gb/s reference-less half-rate digital CDR with unlimited frequency acquisition range and improved input duty-cycle error tolerance," IEEE J. Solid-State Circuits, vol. 46, no. 12, pp. 3150-3162, Dec. 2011.
DOI
|
10 |
H. Song et al., "A 1.0-4.0-Gb/s all-digital CDR with 1.0-ps period resolution DCO and adaptive proportional gain control," IEEE J. Solid-State Circuits, vol. 46, no. 2, pp. 424-434, Feb. 2011.
DOI
|