• 한국통신학회논문지
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• 제27권1A호
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• pp.26-34
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• 2002

IS-95 또는 IMT-2000 등의 이동통신 시스템에서는 10~20msec 길이의 프레임 단위로 정보를 교환하게 되므로 수신측에서는 이와 같은 크기의 프레임을 저장할 버퍼가 필요하다. 연성판정 비터비 복호기를 사용할 때, 이를 위한 버퍼의 크기, 즉 한 프레임에 들어 있는 비트 수는 길쌈부호의 부호율(1 대 n), 전송속도(bps), 그리고 연성판정 비트 수에 비례하여 증가한다. 본 논문에서는 연성판정 비트 수를 4 비트에서 3 비트로 낮추면서 비터비 복호기의 성능 저하를 줄이기 위한 양자화 방법을 제안한다. 연성판정 비트 수(4,3,2,1)별로 양자화 판정 기준 점의 오프셋 크기와 양자화 간격에 대해 비터비 복호기의 성능을 AWGN 환경에서 시뮬레이션 하였고, 이를 토대로 최적의 BER 성능을 갖는 오프셋 크기와 양자화 간격을 결정하였다. 그 결과로서 4 비트 연성판정의 성능에 근접하는 3비트 연성판정 양자화 방법을 도출하였고, IS-95(4 비트)의 최대 40배의 전송속도를 지원하는 IMT-2000 시스템에 적용하였을 대 미미한 성능 손실(-0.05 dB)을 유지하면서 입력 버퍼의 크기를 3/4 배로 줄일 수 있음을 보였다. 또한, 다양한 전송속도에 따라 반복된 누산 입력신호를 제안된 비트 수로 변환하기 위한 최적 SMT(symbol metric table)를 고안하였다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2005년도 추계종합학술대회
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• pp.201-204
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• 2005

In this paper, based on an extended model containing correlator and soft decision decoding, the capacity is evaluated in the single-user case when the inputs are equiprobable. With this method, we adjusted optical communication over AWGN. It is found that only when bit- signal-to-noise ratio (bit-SNR) is high enough, larger M leads to higher capacity; and for a specific M, the optimal values of PPM time offset parameter Td, which maximize the capacity, are independent of bit-SNR. In this paper, the capacity of UWB system in optical fiber over AWGN is proven to improve 1.73 times larger than AWGN channel Capacity.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권4호
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• pp.240-245
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• 2006

Viterbi decoder is composed of BMU(Branch metric Unit), ACSU(Add Compare Select Unit), and SMU(Survivor path Memory Unit). For high speed viterbi decoders, ACSU is the main bottleneck due to the compare-select and feedback operation. Thus, many studies have been advanced to solve the problem. For example, M-step look ahead technique and Minimized method are typical high speed algorithms. In this paper, we designed a bit-level ACSU(K=3, R=1/2, 4bit soft decision) based on those algorithms and switched the matrix product order in the backward direction of Minimized method so as to apply Code-Optimized-Array in order to reduce the area complexity. For experimentation, we synthesized our design by using SYNOPSYS Design compiler, with TSMC 0.18 um library, and verified the timing by using CADENCE verilog-XL.

• ETRI Journal
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• 제28권3호
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• pp.291-300
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• 2006

A simple and general bit log-likelihood ratio (LLR) expression is provided for Gray-coded rectangular quadrature amplitude modulation (R-QAM) signals. The characteristics of Gray code mapping such as symmetries and repeated formats of the bit assignment in a symbol among bit groups are applied effectively for the simplification of the LLR expression. In order to reduce the complexity of the max-log-MAP algorithm for LLR calculation, we replace the mathematical max or min function of the conventional LLR expression with simple arithmetic functions. In addition, we propose an implementation algorithm of this expression. Because the proposed expression is very simple and constructive with some parameters reflecting the characteristic of the Gray code mapping result, it can easily be implemented, providing an efficient symbol de-mapping structure for various wireless applications.

• 한국통신학회논문지
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• 제35권11C호
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• pp.896-900
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• 2010

본 논문은 차세대 저장장치로 각광받고 있는 패턴드 미디어 장치에 대한 트랙 위치 오프셋에 따른 성능을 알아본다. 패턴드 미디어 채널은 SUL(Soft Underlayer)의 유무에 따라 1차원 검출기인 비터비 검출기와 2차원 검출기인 2차원 SOVA(Soft output Viterbi algorithm)를 이용해 실험하였고, 트랙 위치 오프셋이 없을 때, 10%, 20%, 30%, 40% 있을 때 실험하였다. 트랙 위치 오프셋이 10%일 때는 성능영화가 0.3 dB ~ 0.5 dB 정도로 크지 않았지만 그 이상이 되면, 성능열화가 심해지는 것을 볼 수 있다.

• 한국통신학회논문지
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• 제39A권3호
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• pp.121-126
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• 2014

Demand of the data storage becomes more and more growing. This requests the next generation of storage devices to have the dominated storage capability associated with superfast read/write rate. Holographic data storage (HDS) is investigated for a long time and is considered to be a candidate for the future storage system. However, it has two-dimensional intersymbol interference that conventional one-dimensional detection solutions have not yet handled strictly because of the complexity level of system as well as the cost. We propose a new scheme that combines iterative soft output Viterbi algorithm with noise filter for improving the bit error rate performance of HDS.

• 전자공학회논문지B
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• 제31B권12호
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• pp.137-144
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• 1994

In this paepr, we present a soft switching PWM inverter as reducing switching loss and stress at high power application. The PWM inverter is designed by space voltage about 2$\sqrt{3}$ times (15%) than conventional SPWM method. To reduce switching loss and stress. The DC link requires a capacitor, an inductor and two additional switches. Therefore proposed inverter performs trun PWM operation under the soft switching condition. As a result of soft switching we can reduce switching loss and ensure stability of switching devices. For approach to real time, control system is realized by 8 bit single-chip microprocessor. Therefore, we can construct system is with simplified volumn and structure by eliminating carrier wave and referrence wave generator of conventional SPWM method.

• 한국정보통신학회논문지
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• 제26권10호
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• pp.1559-1562
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• 2022

As electronic devices technology scales down into the deep-submicron to achieve high-density, low power and high performance integrated circuits, multiple bit upsets by soft errors have become a major threat to on-chip memory systems. To address the soft error problem, single error correction, double error detection and double adjacent error correction (SEC-DED-DAEC) codes have been recently proposed. But these codes do not troubleshoot mis-correction problem. We propose the SEC-DED_DAEC code with without mis-correction. The decoder for proposed code is implemented as hardware and verified. The results show that there is no mis-correction in the proposed codes and the decoder can be employed on-chip memory system.

• 한국전자파학회논문지
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• 제22권10호
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• pp.1020-1023
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• 2011

본 논문에서는 반복 복호 후 얻게 되는 LLR(Log Likelihood Ratio)로 표현되는 연판정 비트 정보를 이용하여 송신된 BRGC(Binary Reflected Gray Code) M-QAM(M-ary Quadrature Amplitude Modulation) 신호 심벌을 remapping하는 방법을 제시한다. Remapping하기 위해서는 지수함수(exponential function)연산이나 하이퍼블릭 탄젠트(tanh) 함수를 이용하여야 한다. BRGC의 맵핑 법칙에 의해 심벌 remapping은 재귀(recursive) 연산을 이용한다. 또한, 구현 복잡도를 줄이기 위하여 curve fitting 방식을 제안한다.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제7권1호
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• pp.132-148
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• 2013

Via the Internet, the information infrastructure of modern health care has already established medical information systems to share electronic health records among patients and health care providers. Data hiding plays an important role to protect medical images. Because modern medical devices have improved, high resolutions of medical images are provided to detect early diseases. The high quality medical images are used to recognize complicated anatomical structures such as soft tissues, muscles, and internal organs to support diagnosis of diseases. For instance, 16-bit depth medical images will provide 65,536 discrete levels to show more details of anatomical structures. In general, the feature of low utilization rate of intensity in 16-bit depth will be utilized to handle overflow/underflow problem. Nowadays, most of data hiding algorithms are still experimenting on 8-bit depth medical images. We proposed a novel reversible data hiding scheme testing on 16-bit depth CT and MRI medical image. And the peak point and zero point of a histogram are applied to embed secret message k bits without salt-and-pepper.