• 제목/요약/키워드: small signal parameters

검색결과 199건 처리시간 0.024초

2차원 BJT의 전기적 특성 및 왜곡 해석 시뮬레이션 (Simulation for the analysis of distortion and electrical characteristics of a two-dimensional BJT)

  • 이종화;신윤권
    • 전자공학회논문지D
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    • 제35D권4호
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    • pp.84-92
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    • 1998
  • A program was developed to analyze the electrical characteristics and harmonic distrotion in a two-dimensional silicon BJT. The finite difference equations of the small signal and its second and thired harmonics for basic semiconductor equations are formulated treating the nonlinearity and time dependence with Volterra series and Taylor series. The soluations for three sets of simultaneous equations were obtained sequantially by a decoupled iteration method and each set was solved by a modified Stone's algorithm. Distortion magins and ac parameters such as input impedance and current gains are calculated with frequency and load resistance as parameters. The distortion margin vs. load resistancecurves show cancellation minima when the pahse of output voltage shifts. It is shown that the distortionof small signal characteristics can be reduced by reducing the base width, increasing the emitter stripe length and reducing the collector epitaxial layer doping concentration in the silicon BJT structure. The simulation program called TRADAP can be used for the design and optimization of transistors and circuits as well as for the calculation of small signal and distortion solutions.

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전력용 AlGaAs/GaAs HBT의 제작과 소신호 등가 회로 추출에 관한 연구 (A study on the fabrication and the extraction of small signal equivalent circuit of power AlGaAs/GaAs HBTs)

  • 이제희;우효승;원태영
    • 전자공학회논문지A
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    • 제33A권6호
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    • pp.164-171
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    • 1996
  • We report the experimental resutls on AlGaAs/GaAs heterojunction bipolar transistors (HBTs) with carbon-doped base structure. To characterize the output power, load-pull mehtod was employed. By characterizing the devices with HP8510C, we extracted the small-signal equivalent circuit. The HBTs were fabricated employing wet mesa etching and lift-off process of ohmic metals. the implementation of polyimide into the fabriction process was accomplished to obtain the lower dielectric constant resultig in significant reduction of interconnect routing capacitance. The fabricated HBTs with an emitter area of 6${\times}14{\mu}m^{2}$ exhibited current gain of 45, BV$_{CEO}$ of 10V, cut-off frequency of 30GHz and power gain of 1 3dBm. To extract the small signal equivalent circuit, the de-embedded method was applied for parasitic parameters and the calculation of circuit equations for intrinsic parameters.

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RE circuit simulation for high-power LDMOS modules

  • fujioka, Tooru;Matsunaga, Yoshikuni;Morikawa, Masatoshi;Yoshida, Isao
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 ITC-CSCC -2
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    • pp.1119-1122
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    • 2000
  • This paper describes on RF circuit simulation technique, especially on a RF modeling and a model extraction of a LDMOS(Lateral Diffused MOS) that has gate-width (Wg) dependence. Small-signal model parameters of the LDMOSs with various gate-widths extracted from S-parameter data are applied to make the relation between the RF performances and gate-width. It is proved that a source inductance (Ls) was not applicable to scaling rules. These extracted small-signal model parameters are also utilized to remove extrinsic elements in an extraction of a large-signal model (using HP Root MOSFET Model). Therefore, we can omit an additional measurement to extract extrinsic elements. When the large-signal model with Ls having the above gate-width dependence is applied to a high-power LDMOS module, the simulated performances (Output power, etc.) are in a good agreement with experimental results. It is proved that our extracted model and RF circuit simulation have a good accuracy.

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이종접합 바이폴라 트랜지스터에 관한 소신호 등가회로의 정확한 모델링 (Accurate modeling of small-signal equivalent circuit for heterojunction bipolar transistors)

  • 이성현
    • 전자공학회논문지A
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    • 제33A권7호
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    • pp.156-161
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    • 1996
  • Accurate equivalent circuit modeling using multi-circuit optimization has been perfomred for detemining small-signal model of AlGaAs/GaAs HBTs. Three equivalent circuits for a cutoff biasing and two active biasing at different curretns are optimized simultaneously to fit gheir S parameters under the physics-based constrain that current-dependent elements for one of active circuits are connected to those for another circit multiplied by the ratio of two currents. The cutoff mode circuit and the physical constrain give the advantage of extracting physically acceptable parameters, because the number of unknown variables. After this optimization, three ses of optimized model S-parameters agree well with their measured S-parameters from 0.045 GHz to 26.5GHz.

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망각소자를 갖는 t-분포 강인 연속 추정을 이용한 음성 신호 추정에 관한 연구 (Robust Sequential Estimation based on t-distribution with forgetting factor for time-varying speech)

  • 이주헌
    • 한국음향학회:학술대회논문집
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    • 한국음향학회 1998년도 제15회 음성통신 및 신호처리 워크샵(KSCSP 98 15권1호)
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    • pp.470-474
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    • 1998
  • In this paper, to estimate the time-varying parameters of speech signal, we use the robust sequential estimator based on t-distribution and, for time-varying signal, introduce the forgetting factor. By using the RSE based on t-distribution with small degree of freedom, we can alleviate efficiently the effects of outliers to obtain the better performance of parameter estimation. Moreover, by the forgetting factor, the proposed algorithm can estimate the accurate parameters under the rapid variation of speech signal.

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Analysis of Parameter Effects on the Small-Signal Dynamics of Buck Converters with Average Current Mode Control

  • Li, Ruqi;O'Brien, Tony;Lee, John;Beecroft, John;Hwang, Kenny
    • Journal of Power Electronics
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    • 제12권3호
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    • pp.399-409
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    • 2012
  • In DC-DC Buck converters with average current mode control, the current loop compensator provides additional design freedom to enhance the converter current loop performance. On the other hand, the current loop circuit elements append substantial amount of complexity to not only the inner current loop but also the outer voltage loop, which makes it demanding to quantify circuit and operating parameter effects on the small-signal dynamics of such converters. Despite the difficulty, it is shown in this paper that parameter effects can be analyzed satisfactorily by using an existing small-signal model in conjunction with a newly proposed simplified alternative. As a result of the study, new insight into average current mode control is uncovered and discussed quantitatively. Measurable experimental results on a prototype averaged-current-mode-controlled Buck converter are provided to facilitate the analytical study with good correlation.

다중 바이어스 추출 기법을 이용한 HEMT 소신호 파라미터 추출 (Parameter Extraction of HEMT Small-Signal Equivalent Circuits Using Multi-Bias Extraction Technique)

  • 강보술;전만영;정윤하
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(1)
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    • pp.353-356
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    • 2000
  • Multi-bias parameter extraction technique for HEMT small signa] equivalent circuits is presented in this paper. The technique in this paper uses S-parameters measured at various bias points in the active region to construct one optimization problem, of which the vector of unknowns contains only a set of bias-independent elements. Tests are peformed on measured S-parameters of a pHEMT at 30 bias points. Results indicate that the calculated S-parameters is similar to the measured data.

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Reverse Engineering을 이용한 $Al_{x}Ga_{1-x}As/In_{y}Ga_{1-y}$As P-HEMTs의 구조적 분석 (Structural analysis of $Al_{x}Ga_{1-x}As/In_{y}Ga_{1-y}$As P-HEMTs reverse engineering)

  • 김병헌;황광철;안형근;한득영
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
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    • pp.255-258
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    • 2001
  • In this paper, DC and small signal characteristics with different physical parameters are expected for p-HEMTs (Pseudomorphic High Electron Mobility Transistors) with different temperatures ranging from 300K to 623K which are widely used for a low noise and/or ultra high frequency device. A device of 0.2$\times$200 ${\mu}{\textrm}{m}$$^2$dimension having very low noise has been chosen to extract the experimental data. Theoretical prediction has been obtained using a simulaor(HELENA) which needs experimental input data extracted from reverse engineering process. From the results, relation between structural parameters and temperature dependency of electrical characteristics are qualitatively explained to use in the design of descrete and integrated circuits to guarantee the optimal operation of the system.

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Investigation of Open-Loop Transmit Power Control Parameters for Homogeneous and Heterogeneous Small-Cell Uplinks

  • Haider, Amir;Sinha, Rashmi Sharan;Hwang, Seung-Hoon
    • ETRI Journal
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    • 제40권1호
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    • pp.51-60
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    • 2018
  • In Long Term Evolution (LTE) cellular networks, the transmit power control (TPC) mechanism consists of two parts: the open loop (OL) and closed loop. Most cellular networks consider OL/TPC because of its simple implementation and low operation cost. The analysis of OL/TPC parameters is essential for efficient resource management from the cellular operator's viewpoint. In this work, the impact of the OL/TPC parameters is investigated for homogeneous small cells and heterogeneous small-cell/macrocell network environments. A mathematical model is derived to compute the transmit power at the user equipment, the received power at the eNodeB, the interference in the network, and the received signal-to-interference ratio. Using the analytical platform, the effects of the OL/TPC parameters on the system performance in LTE networks are investigated. Numerical results show that, in order to achieve the best performance, it is appropriate to choose ${\alpha}_{small}=1$ and $P_{o-small}=-100dBm$ in a homogenous small-cell network. Further, the selections of ${\alpha}_{small}=1$ and $P_{o-small}=-100dBm$ in the small cells and ${\alpha}_{macro}=0.8$ and $P_{o-macro}=-100dBm$ in the macrocells seem to be suitable for heterogeneous network deployment.

GaAs FET소자 모델링을 위한 소신호 모델의 검증과 대신호 모델 추출기 개발 (Development of Large Signal Model Extractor and Small Signal Model Verification for GaAs FET Devices)

  • 최형규;전계익;김병성;이종철;이병제;김종헌;김남영
    • 한국전자파학회논문지
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    • 제12권5호
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    • pp.787-794
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    • 2001
  • 본 논문에서는 초고주파 회로에 사용되는 GaAs FET의 대신호 모델 추출기 개발에 관하여 다루었다. 모델링을 하기에 앞서 모델링에 필요한 대량의 측정 데이터를 얻기 위하여 컴퓨터에서 자동제어가 가능한 측정프로그램을 개발하였고 측정계에서 생기는 전압강하를 막기 위해 전압 강하 보상을 위한 알고리즘을 측정프로그램에 추가하였다. 소신호 모델은 대신호 모델의 복잡도를 고려하여 7개의 내부 파라미터를 갖는 소신호 모델을 사용하였으며 각 바이어스에서의 측정된 산란계수를 소신호 모델이 예측한 산란계수 결과와 비교하여 소신호 모델의 바이어스에 따른 정확성을 검증하였다. 대신호 모델은 다양한 비선형 시뮬레이션에 유리하도록 변형된 맞춤함수 모델을 사용하였고 대신호 모델 파라미터 추출 과정에서는 일차원적 최적화 기법을 통하여 최적화된 파라미터를 추출하였다. 이러한 연구는 비선형 히로 설계 시 필요한 대신호 모델의 추출시간과 측정시간을 단축시킬 수 있고 빠른 시뮬레이션 특성으로 인해 초고주파회로로 설계용 시뮬레이터에서의 최적화과정 수행에 적합한 모델을 얻을 수 있다.

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