• Title/Summary/Keyword: small signal parameters

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Simulation for the analysis of distortion and electrical characteristics of a two-dimensional BJT (2차원 BJT의 전기적 특성 및 왜곡 해석 시뮬레이션)

  • 이종화;신윤권
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.35D no.4
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    • pp.84-92
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    • 1998
  • A program was developed to analyze the electrical characteristics and harmonic distrotion in a two-dimensional silicon BJT. The finite difference equations of the small signal and its second and thired harmonics for basic semiconductor equations are formulated treating the nonlinearity and time dependence with Volterra series and Taylor series. The soluations for three sets of simultaneous equations were obtained sequantially by a decoupled iteration method and each set was solved by a modified Stone's algorithm. Distortion magins and ac parameters such as input impedance and current gains are calculated with frequency and load resistance as parameters. The distortion margin vs. load resistancecurves show cancellation minima when the pahse of output voltage shifts. It is shown that the distortionof small signal characteristics can be reduced by reducing the base width, increasing the emitter stripe length and reducing the collector epitaxial layer doping concentration in the silicon BJT structure. The simulation program called TRADAP can be used for the design and optimization of transistors and circuits as well as for the calculation of small signal and distortion solutions.

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A study on the fabrication and the extraction of small signal equivalent circuit of power AlGaAs/GaAs HBTs (전력용 AlGaAs/GaAs HBT의 제작과 소신호 등가 회로 추출에 관한 연구)

  • 이제희;우효승;원태영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.6
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    • pp.164-171
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    • 1996
  • We report the experimental resutls on AlGaAs/GaAs heterojunction bipolar transistors (HBTs) with carbon-doped base structure. To characterize the output power, load-pull mehtod was employed. By characterizing the devices with HP8510C, we extracted the small-signal equivalent circuit. The HBTs were fabricated employing wet mesa etching and lift-off process of ohmic metals. the implementation of polyimide into the fabriction process was accomplished to obtain the lower dielectric constant resultig in significant reduction of interconnect routing capacitance. The fabricated HBTs with an emitter area of 6${\times}14{\mu}m^{2}$ exhibited current gain of 45, BV$_{CEO}$ of 10V, cut-off frequency of 30GHz and power gain of 1 3dBm. To extract the small signal equivalent circuit, the de-embedded method was applied for parasitic parameters and the calculation of circuit equations for intrinsic parameters.

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RE circuit simulation for high-power LDMOS modules

  • fujioka, Tooru;Matsunaga, Yoshikuni;Morikawa, Masatoshi;Yoshida, Isao
    • Proceedings of the IEEK Conference
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    • 2000.07b
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    • pp.1119-1122
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    • 2000
  • This paper describes on RF circuit simulation technique, especially on a RF modeling and a model extraction of a LDMOS(Lateral Diffused MOS) that has gate-width (Wg) dependence. Small-signal model parameters of the LDMOSs with various gate-widths extracted from S-parameter data are applied to make the relation between the RF performances and gate-width. It is proved that a source inductance (Ls) was not applicable to scaling rules. These extracted small-signal model parameters are also utilized to remove extrinsic elements in an extraction of a large-signal model (using HP Root MOSFET Model). Therefore, we can omit an additional measurement to extract extrinsic elements. When the large-signal model with Ls having the above gate-width dependence is applied to a high-power LDMOS module, the simulated performances (Output power, etc.) are in a good agreement with experimental results. It is proved that our extracted model and RF circuit simulation have a good accuracy.

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Accurate modeling of small-signal equivalent circuit for heterojunction bipolar transistors (이종접합 바이폴라 트랜지스터에 관한 소신호 등가회로의 정확한 모델링)

  • 이성현
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.7
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    • pp.156-161
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    • 1996
  • Accurate equivalent circuit modeling using multi-circuit optimization has been perfomred for detemining small-signal model of AlGaAs/GaAs HBTs. Three equivalent circuits for a cutoff biasing and two active biasing at different curretns are optimized simultaneously to fit gheir S parameters under the physics-based constrain that current-dependent elements for one of active circuits are connected to those for another circit multiplied by the ratio of two currents. The cutoff mode circuit and the physical constrain give the advantage of extracting physically acceptable parameters, because the number of unknown variables. After this optimization, three ses of optimized model S-parameters agree well with their measured S-parameters from 0.045 GHz to 26.5GHz.

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Robust Sequential Estimation based on t-distribution with forgetting factor for time-varying speech (망각소자를 갖는 t-분포 강인 연속 추정을 이용한 음성 신호 추정에 관한 연구)

  • 이주헌
    • Proceedings of the Acoustical Society of Korea Conference
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    • 1998.08a
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    • pp.470-474
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    • 1998
  • In this paper, to estimate the time-varying parameters of speech signal, we use the robust sequential estimator based on t-distribution and, for time-varying signal, introduce the forgetting factor. By using the RSE based on t-distribution with small degree of freedom, we can alleviate efficiently the effects of outliers to obtain the better performance of parameter estimation. Moreover, by the forgetting factor, the proposed algorithm can estimate the accurate parameters under the rapid variation of speech signal.

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Analysis of Parameter Effects on the Small-Signal Dynamics of Buck Converters with Average Current Mode Control

  • Li, Ruqi;O'Brien, Tony;Lee, John;Beecroft, John;Hwang, Kenny
    • Journal of Power Electronics
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    • v.12 no.3
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    • pp.399-409
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    • 2012
  • In DC-DC Buck converters with average current mode control, the current loop compensator provides additional design freedom to enhance the converter current loop performance. On the other hand, the current loop circuit elements append substantial amount of complexity to not only the inner current loop but also the outer voltage loop, which makes it demanding to quantify circuit and operating parameter effects on the small-signal dynamics of such converters. Despite the difficulty, it is shown in this paper that parameter effects can be analyzed satisfactorily by using an existing small-signal model in conjunction with a newly proposed simplified alternative. As a result of the study, new insight into average current mode control is uncovered and discussed quantitatively. Measurable experimental results on a prototype averaged-current-mode-controlled Buck converter are provided to facilitate the analytical study with good correlation.

Parameter Extraction of HEMT Small-Signal Equivalent Circuits Using Multi-Bias Extraction Technique (다중 바이어스 추출 기법을 이용한 HEMT 소신호 파라미터 추출)

  • 강보술;전만영;정윤하
    • Proceedings of the IEEK Conference
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    • 2000.11a
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    • pp.353-356
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    • 2000
  • Multi-bias parameter extraction technique for HEMT small signa] equivalent circuits is presented in this paper. The technique in this paper uses S-parameters measured at various bias points in the active region to construct one optimization problem, of which the vector of unknowns contains only a set of bias-independent elements. Tests are peformed on measured S-parameters of a pHEMT at 30 bias points. Results indicate that the calculated S-parameters is similar to the measured data.

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Structural analysis of $Al_{x}Ga_{1-x}As/In_{y}Ga_{1-y}$As P-HEMTs reverse engineering (Reverse Engineering을 이용한 $Al_{x}Ga_{1-x}As/In_{y}Ga_{1-y}$As P-HEMTs의 구조적 분석)

  • 김병헌;황광철;안형근;한득영
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2001.07a
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    • pp.255-258
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    • 2001
  • In this paper, DC and small signal characteristics with different physical parameters are expected for p-HEMTs (Pseudomorphic High Electron Mobility Transistors) with different temperatures ranging from 300K to 623K which are widely used for a low noise and/or ultra high frequency device. A device of 0.2$\times$200 ${\mu}{\textrm}{m}$$^2$dimension having very low noise has been chosen to extract the experimental data. Theoretical prediction has been obtained using a simulaor(HELENA) which needs experimental input data extracted from reverse engineering process. From the results, relation between structural parameters and temperature dependency of electrical characteristics are qualitatively explained to use in the design of descrete and integrated circuits to guarantee the optimal operation of the system.

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Investigation of Open-Loop Transmit Power Control Parameters for Homogeneous and Heterogeneous Small-Cell Uplinks

  • Haider, Amir;Sinha, Rashmi Sharan;Hwang, Seung-Hoon
    • ETRI Journal
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    • v.40 no.1
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    • pp.51-60
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    • 2018
  • In Long Term Evolution (LTE) cellular networks, the transmit power control (TPC) mechanism consists of two parts: the open loop (OL) and closed loop. Most cellular networks consider OL/TPC because of its simple implementation and low operation cost. The analysis of OL/TPC parameters is essential for efficient resource management from the cellular operator's viewpoint. In this work, the impact of the OL/TPC parameters is investigated for homogeneous small cells and heterogeneous small-cell/macrocell network environments. A mathematical model is derived to compute the transmit power at the user equipment, the received power at the eNodeB, the interference in the network, and the received signal-to-interference ratio. Using the analytical platform, the effects of the OL/TPC parameters on the system performance in LTE networks are investigated. Numerical results show that, in order to achieve the best performance, it is appropriate to choose ${\alpha}_{small}=1$ and $P_{o-small}=-100dBm$ in a homogenous small-cell network. Further, the selections of ${\alpha}_{small}=1$ and $P_{o-small}=-100dBm$ in the small cells and ${\alpha}_{macro}=0.8$ and $P_{o-macro}=-100dBm$ in the macrocells seem to be suitable for heterogeneous network deployment.

Development of Large Signal Model Extractor and Small Signal Model Verification for GaAs FET Devices (GaAs FET소자 모델링을 위한 소신호 모델의 검증과 대신호 모델 추출기 개발)

  • 최형규;전계익;김병성;이종철;이병제;김종헌;김남영
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.5
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    • pp.787-794
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    • 2001
  • In this paper, the development of large-signal model extractor for GaAs FET device through the Monolithic Microwave integrated Circuit(MMIC) is presented. The measurement program controlled by personal computer is developed for the processing of an amount of measured data, and the de-embedding algorithm is added to the program for voltage dropping as attached series resistance on measurement system. The small-signal model parameters are typically consisted of 7 elements that are considered as complexity of large-signal model and its the accuracy of the small-signal model is verified through comparing with measured data as varied bias point. The fitting function model, one of the empirical model, is used for quick simulation. In the process of large-signal model parameter extraction, one-dimensional optimization method is proposed and optimized parameters are extracted. This study can reduce the modeling and measuring time and can secure a suitable model for circuit.

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