• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.903-906
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• 2003

In this paper, we proposed high slew-rate and low-power OP-AMP of the data driver for TFT-LCDs. Proposed OP-AMP contains newly developed rail-to-rail class-AB input circuit which enables the low-quiescent current and high slew-rate OP-AMP. The slew-rate and the quiescent current of the proposed OP-AMP are 31.2V/$\mu$sec and 5$\mu$A, respectively.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.1011-1014
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• 2003

We proposed a new two-stage operational amplifier that increases the slew rate by adding some simple circuitry to the conventional structure. The proposed circuit is simulated by HSPICE and the slew rate of the proposed circuit is improved more than 10 times than that of conventional one in slewing state without considerable increments in area and power consumption.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.5
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• pp.688-696
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• 2014

A slew-rate control method of LCD driver ICs is introduced to increase uniformity between adjacent driver ICs and reduce power consumption. The slew rate of every voltage follower is calibrated by a feedback algorithm during the non-displaying period. Under normal operation mode, the slew rate is dynamically controlled for improving power efficiency. Experimental results show that the power consumption is reduced by 16% with a white pattern and by 10% with a black pattern, and display defects are successfully eliminated.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.5
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• pp.730-736
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• 1995

This paper presents the design of a CMOS programmable slew rate operational amplifier based upon a newly proposed concept, that is a switched parallel current subtraction circuit with adaptive biasing technique. By utilizing the newly designed circuit, it was proven that slew rate was linearly controlled and power dissipation was optimized. If the programmable slew rate amplifier is employed into mixed signal system, it can furnish the convenience of timing control and optimized power dissipation. Simulated data showed the slew rate ranging from 5. 83V/$\mu$s to 41.4V/$\mu$s, power dissipation ranging from 1.13mW to 4.1mW, and the other circuit performance parameters were proven to be comparable with those of a conventional operational amplifier.

• JSTS:Journal of Semiconductor Technology and Science
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• v.13 no.4
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• pp.263-271
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• 2013

A low dropout regulator (LDO) with fast transient responses is presented. The proposed LDO eliminates the trade-off between slew rate and unity gain bandwidth, which are the key parameters for fast transient responses. In the proposed buffer, by changing the slew current path, the slew rate and unity gain bandwidth can be controlled independently. Implemented in $0.18-{\mu}m$ high voltage CMOS, the proposed LDO shows up to 200 mA load current with 0.2 V dropout voltage for $1{\mu}F$ output capacitance. The measured maximum transient output voltage variation, minimum quiescent current at no load condition, and maximum unity gain frequency are 24 mV, $7.5{\mu}A$, and higher than 1 MHz, respectively.

• Transactions of The Korea Fluid Power Systems Society
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• v.3 no.1
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• pp.7-14
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• 2006

In this paper, an in-process diagnosis method for performance of position control servo system was studied, which was based upon null bias, slew-rate ratio and delay time measurement. Slew-rate ratio and delay time were analyzed by theoretical analysis, computer simulation and experiment. As a result of these analysis, when spool of servovalve was weared, slew-rate ratio was decreased and delay time was increased.

• The Journal of the Korea institute of electronic communication sciences
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• v.18 no.4
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• pp.571-578
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• 2023

In this paper, we propose a low EMI data transmitter employing a delay-locked loop for vehicles. For the low EMI characteristic, the transmitter has been designed to have low slew rate and employs the delay-locked loop to correct the amount of change in the slew rate due to process variations. According to simulation results, the proposed transmitter which the delay-locked loop has smaller slew rate change as compared to the conventional transmitter. The proposed circuit has been designed with a 65nm process technology and the data rate is 20Mbps with a supply voltage of 1.1V. As compared to a conventional transmitter, the proposed transmitter shows that variations of the slew rate become 53.6% lower in a fast condition and 13.07% lower in a slow condition.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.23 no.4
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• pp.431-437
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• 2019

PLC(Power Line Communication) is being used in various ways in smart grid system because of the advantages of low cost and high data throughput. However, power line channel has many problems due to impulse noise and various studies have been conducted to solve the problem. Recently, ACDL(Adaptive Cannonical Differential Limiter) which is based on an adaptive clipping with analog nonlinear filter, has been proposed and performs better than the others. In this paper, we show that ACDL is similar to the detection of slew rate with oversampled digital signal by simplification and analysis. Through the simulation under the PRIME standard it is shown that the proposed performs equal to or better than that of ACDL, but significantly reduce the complexity to implement. The BER performance is equal but the complexity is reduced to less than 10%.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2006.10a
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• pp.293-316
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• 2006

[ $\blacksquare$ ] I/O Signal $\square$ We see adequate margin for the RC B design $\square$ Minimum ODW value is 328ps using Ac to DC measurement for the read case. $\square$ Minimum ODW value is 350ps using AC to DC mesurement method for the write case. $\blacksquare$ CLK Signal $\square$ The slew-rate decreases when the Cterm value increases $\square$ Lower slew-rate could effect delay and jitter. $\square$ There are some ldge issues during transitions with lower Cterm and without Cterm. $\square$ Our recommendation for the Cterm value range is between 1.5pF to 2.4pF. $\blacksquare$ ADD/CMD/Ctrl Signal $\square$ High output slew-rate at low VDD causes ring back that reduces voltage margin because of x-talk. $\square$ 30ohm Rterm for the CTRL signal shows a better signal integrity result compared to 36ohm.

• 한국정보디스플레이학회:학술대회논문집
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• 2003.07a
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• pp.72-75
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• 2003

For the analog output buffer in the data driver for large size and high resolution TFT-LCDs, we proposed operational amplifier (op-amp) which contains newly developed transconductance-boosted input stage which enables the low-power consumption and the high slew-rate. The slew-rate and the quiescent current of the proposed op-amp are $6.1V/{\mu}sec$ and $8{\mu}A$, respectively.