• Title/Summary/Keyword: single fuse

Search Result 52, Processing Time 0.026 seconds

Experimental investigations on resilient beam-column end-plate connection with structural fuse

  • Arunkumar Chandrasekaran;Umamaheswari Nambiappan
    • Steel and Composite Structures
    • /
    • v.47 no.3
    • /
    • pp.315-337
    • /
    • 2023
  • The steel structure is an assembly of individual structural members joined together by connections. The connections are the focal point to transfer the forces which is susceptible to damage easily. It is challenging to replace the affected connection parts after an earthquake. Hence, steel plates are utilised as a structural fuse that absorbs connection forces and fails first. The objective of the present research is to develop a beam-column end plate connection with single and dual fuse and study the effect of single fuse, dual fuse and combined action of fuse and damper. In this research, seismic resilient beam-column end plate connection is developed in the form of structural fuse. The novel connection consists of one main fuse was placed horizontally and secondary fuse was placed vertically over main fuse. The specimens are fabricated with the variation in number of fuse (single and dual) and position of fuse (beam flange top and bottom). From the fabricated ten specimens five specimens were loaded monotonically and five cyclically. The experimental results are compared with Finite Element Analysis results of Arunkumar and Umamaheswari (2022). The results are critically assessed in the aspect of moment-rotation behaviour, strain in connection components, connection stiffness, energy dissipation characteristics and ductility. While comparing the performance of total five specimens, the connection with fuse exhibited superior performance than the conventional connection. An equation is proposed for the moment of resistance of end-plate connection without and with structural fuse.

A Study on the Fuse Sizing Technique for the Protection of Satellite Power System (인공위성 전력 시스템 보호를 위한 퓨즈 선정 기법 연구)

  • Jeon, Hyeon-Jin;Lim, Seong-Bin;Lee, Sang-Rok
    • Aerospace Engineering and Technology
    • /
    • v.11 no.1
    • /
    • pp.1-6
    • /
    • 2012
  • Power system in satellite is protected by installing fuses, LCLs (Latching Current Limiters), etc. between satellite power supply and loads. In this paper, the fuse sizing technique for satellite power system protection is addressed. Detailed fuse sizing method is explained and it is shown that the single fuse connection method is mathematically subordinated to the parallel fuse connection method. In addition, appropriate fuse selection method is newly suggested under a situation where exact current characteristics of a load connected to a fuse is unknown.

Design of eFuse OTP IP for Illumination Sensors Using Single Devices (Single Device를 사용한 조도센서용 eFuse OTP IP 설계)

  • Souad, Echikh;Jin, Hongzhou;Kim, DoHoon;Kwon, SoonWoo;Ha, PanBong;Kim, YoungHee
    • Journal of IKEEE
    • /
    • v.26 no.3
    • /
    • pp.422-429
    • /
    • 2022
  • A light sensor chip requires a small capacity eFuse (electrical fuse) OTP (One-Time Programmable) memory IP (Intellectual Property) to trim analog circuits or set initial values of digital registers. In this paper, 128-bit eFuse OTP IP is designed using only 3.3V MV (Medium Voltage) devices without using 1.8V LV (Low-Voltage) logic devices. The eFuse OTP IP designed with 3.3V single MOS devices can reduce a total process cost of three masks which are the gate oxide mask of a 1.8V LV device and the LDD implant masks of NMOS and PMOS. And since the 1.8V voltage regulator circuit is not required, the size of the illuminance sensor chip can be reduced. In addition, in order to reduce the number of package pins of the illumination sensor chip, the VPGM voltage, which is a program voltage, is applied through the VPGM pad during wafer test, and the VDD voltage is applied through the PMOS power switching circuit after packaging, so that the number of package pins can be reduced.

Analysis on Recloser-Fuse Coordination in Loop Power Distribution System with Superconducting Fault Current Limiters (루프화 배전계통에 초전도 한류기 적용에 따른 Recloser-Fuse 보호협조 분석)

  • Choi, Kyu-Wan;Kim, Soo-Swan;Moon, Jong-Fil
    • The Transactions of the Korean Institute of Electrical Engineers P
    • /
    • v.64 no.3
    • /
    • pp.111-115
    • /
    • 2015
  • Recently, protection coordination issues can occur due to increased fault current in power system when power system being changed radial power system to grid system such as loop power system, micro grid and smart grid. This paper analyzed Recloser-Fuse coordination in loop power distribution system with Superconducting Fault Current Limiters(SFCLs) when single line ground fault occur in loop power distribution system with SFCLs. We analyzed Recloser-Fuse Coordination in radial power distribution system and changed coordination caused by increased Fault current because of loop system when single line ground fault occur in power distribution system. This paper simulated to improve changed coordination using SFCLs in loop power distribution system. Power distribution system, SFCLs and protective devices are modeled using PSCAD/EMTDC.

Deign of Small-Area Dual-Port eFuse OTP Memory IP for Power ICs (PMIC용 저면적 Dual Port eFuse OTP 메모리 IP 설계)

  • Park, Heon;Lee, Seung-Hoon;Park, Mu-Hun;Ha, Pan-Bong;Kim, Young-Hee
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
    • /
    • v.8 no.4
    • /
    • pp.310-318
    • /
    • 2015
  • In this paper, dual-port eFuse OTP (one-time programmable) memory cells with smaller cell sizes are used, a single VREF (reference voltage) is used in the designed eFuse OTP IP (intellectual property), and a BL (bit-line) sensing circuit using a S/A (sense amplifier) based D F/F is proposed. With this proposed sensing technique, the read current can be reduced to 3.887mA from 6.399mA. In addition, the sensing resistances of a programmed eFuse cell in the program-verify-read and read mode are also reduced to $9k{\Omega}$ and $5k{\Omega}$ due to the analog sensing. The layout size of the designed 32-bit eFuse OTP memory is $187.845{\mu}m{\times}113.180{\mu}m$ ($=0.0213{\mu}m2$), which is confirmed to be a small-area implementation.

Application of frictional sliding fuse in infilled frames, fuse adjustment and influencing parameters

  • Mohammadi-Gh, M.;Akrami, V.
    • Structural Engineering and Mechanics
    • /
    • v.36 no.6
    • /
    • pp.715-727
    • /
    • 2010
  • An experimental investigation is conducted here to study the effects of applying frictional sliding fuses (FSF) in concrete infilled steel frames. Firstly, the influences of some parameters on the behavior of the sliding fuse are studied: Methods of adjusting the FSF for a certain sliding strength are explained and influences of time duration, welding and corrosion are investigated as well. Based on the results, time duration does not significantly affect the FSF, however influences of welding and corrosion of the constitutive plates are substantial. Then, the results of testing two 1/3 scale single-storey single-bay concrete infilled steel frames having FSF are presented. The specimens were similar, except for different regulations of their fuses, tested by displacement controlled cyclic loading. The results demonstrate that applying FSF improves infill behaviors in both perpendicular directions. The infilled frames with FSF have more appropriate hysteresis cycles, higher ductility, much lower deteriorations in strength and stiffness in comparison with regular ones. Consequently, the infills, provided with FSF, can be regarded as an engineered element, however, special consideration should be taken into the affecting parameters of their fuses.

Design for a Fuse of High Durability Protection Elements for Improving the Safety of DC Current Measurement Device (직류전류측정기의 안전성 향상을 위한 고내구성 보호소자의 가용체 설계)

  • Lee, Ye Ji;Youn, Jae Seo;Cho, Sung Chul;Noh, Sung Yeo
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.33 no.3
    • /
    • pp.201-207
    • /
    • 2020
  • With the expansion in the use of DC power systems and increased need for system maintenance, the development of measurement devices for maintenance requires high stability. Of the different kinds of DC current measurement devices, the single-shot measurement device causes the input signal of the current measuring unit to initially generate a high inrush current. The high inrush current flows into the signal processor of the meter, shortening the life of the internal fuses and causing failure. Therefore, in this study, the I2t value for increasing the durability of the fuse is designed using the available wire diameter. Operating characteristics for 210~400% over-current of the rated current, which is relatively low over-current, are realized by the plating of low melting tin metal. As a result, a method of designing a fuse element for a DC power supply, which improves the safety of the DC current measurement device by blocking the failure caused by the inrush current, is presented.

Design of eFuse OTP Memory Programmable in the Post-Package State for PMICs (Post-Package 프로그램이 가능한 eFuse OTP 메모리 설계)

  • Jin, Liyan;Jang, Ji-Hye;Kim, Jae-Chul;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.16 no.8
    • /
    • pp.1734-1740
    • /
    • 2012
  • In this paper, we propose a FSOURCE circuit which requires such a small switching current that an eFuse OTP memory can be programmed in the post-package state of the PMIC chips using a single power supply. The proposed FSOURCE circuit removes its short-circuit current by using a non-overlapped clock and reduces its maximum current by reducing the turned-on slope of its driving transistor. Also, we propose a DOUT buffer circuit initializing the output data of the eFuse OTP memory with arbitrary data during the power-on reset mode. We design a 24-bit differential paired eFuse OTP memory which uses Magnachip's $0.35{\mu}m$ BCD process, and the layout size is $381.575{\mu}m{\times}354.375{\mu}m$($=0.135mm^2$).

Implementation and design of fuse controller using single wire serial communication (단일 입력 직렬 통신을 이용한 퓨즈 제어 회로설계 및 구현)

  • Park, Sang-bong;Heo, Jeong-hwa
    • The Journal of the Institute of Internet, Broadcasting and Communication
    • /
    • v.15 no.6
    • /
    • pp.251-255
    • /
    • 2015
  • In this paper, we propose a fuse controller which is used for storing the optimal value or the correction value for the surrounding product of the IoT applications and it is implemented serial communication circuit using a single pin. Because of the proposed single pin protocol is simpler in the hardware than the conventional $I^2C$ and SPI using two or more pins, it is suitable for the area of small amount of data transmission. The function of the one pin protocol is verified by logic simulation and the FPGA test board and it is fabricated using CMOS 0.35um technology. It is expected to use the IoT product that require the low power consumption and simple hardware.

Experimental and numerical study of a proposed steel brace with a localized fuse

  • Parsa, Elham;Ghazi, Mohammad;Farahbod, Farhang
    • Structural Engineering and Mechanics
    • /
    • v.84 no.2
    • /
    • pp.269-283
    • /
    • 2022
  • In this paper, a particular type of all-steel HSS brace members with a locally reduced cross-sectional area was experimentally and numerically investigated. The brace member was strengthened against local buckling with inner and outer boxes in the reduced area. Four single-span braced frames were tested under cyclic lateral loadings. Specimens included a simple steel frame with a conventional box-shaped brace and three other all-steel reduced section buckling-restrained braces. After conducting the experimental program, numerical models of the proposed brace were developed and verified with experimental results. Then the length of the proposed fuse was increased and its effect on the cyclic behavior of the brace was investigated numerically. Eventually, the brace was detailed with a fuse-to-brace length of 30%, as well as the cross-sectional area of the fuse-to-brace of 30%, and the cyclic behavior of the system was studied numerically. The study showed that the proposed brace is stable up to a 2% drift ratio, and the plastic cumulative deformation requirement of AISC (2016) is easily achieved. The proposed brace has sufficient ductility and stability and is lighter, as well as easier to be fabricated, compared to the conventional mortar-filled BRB and all-steel BRB.