• 제목/요약/키워드: silicon-on-insulator

검색결과 349건 처리시간 0.027초

Effect of Fluoride-based Plasma Treatment on the Performance of AlGaN/GaN MISHFET

  • Ahn, Ho-Kyun;Kim, Hae-Cheon;Kang, Dong-Min;Kim, Sung-Il;Lee, Jong-Min;Lee, Sang-Heung;Min, Byoung-Gue;Yoon, Hyoung-Sup;Kim, Dong-Young;Lim, Jong-Won;Kwon, Yong-Hwan;Nam, Eun-Soo;Park, Hyoung-Moo;Lee, Jung-Hee
    • ETRI Journal
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    • 제38권4호
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    • pp.675-684
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    • 2016
  • This paper demonstrates the effect of fluoride-based plasma treatment on the performance of $Al_2O_3/AlGaN/GaN$ metal-insulator-semiconductor heterostructure field effect transistors (MISHFETs) with a T-shaped gate length of $0.20{\mu}m$. For the fabrication of the MISHFET, an $Al_2O_3$ layer as a gate dielectric was deposited using atomic layer deposition, which greatly decreases the gate leakage current, followed by the deposition of the silicon nitride layer. The silicon nitride layer on the gate foot region was then selectively removed through a reactive ion etching technique using $CF_4$ plasma. The etching process was continued for a longer period of time even after the complete removal of the silicon nitride layer to expose the $Al_2O_3$ gate dielectric layer to the plasma environment. The thickness of the $Al_2O_3$ gate dielectric layer was slowly reduced during the plasma exposure. Through this plasma treatment, the device exhibited a threshold voltage shift of 3.1 V in the positive direction, an increase of 50 mS/mm in trans conductance, a degraded off-state performance and a larger gate leakage current compared with that of the reference device without a plasma treatment.

SOI 구조 가속도센서의 온도 특성 해석 (Analysis of Temperature Characteristics on Accelerometer using SOI Structure)

  • 손미정;서희돈
    • 센서학회지
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    • 제9권1호
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    • pp.1-8
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    • 2000
  • 최근, 자동차가 점점 고급화 되어감에 따라 자동차엔진과 같이 $200^{\circ}C$ 이상의 고온과 부식적인 환경 하에 사용되어 질 수 있는 고성능의 실리콘 가속도센서의 장착이 기대되고 있다. 그러나 실리콘은 본질적으로 온도의 영향이 큰 물질이고, p-n 접합으로 압저항이 형성되기 때문에 $150^{\circ}C$ 이상이 되면 누설전류가 급격하게 증가하여 센서의 성능을 떨어뜨린다. 본 연구에서는 SOI 구조를 이용한 가속도센서의 온도특성을 해석하고, 유한요소법(finite element method)을 이용하여 감도 온도계수(TCS) 및 오프셋전압 온도계수(TCO)의 열잔류응력과의 관련성을 검토하였다. 그 결과, TCS는 압저항의 불순물 농도를 최적화함으로써 줄일 수 있고, TCO는 압저항의 열잔류응력과 불균일한 공정에 관계가 있다는 것을 알았다. 그리고 센서의 중앙지지구조에 있어서 패키징 열잔류응력의 평균값은 약 $3.7{\times}10^4Nm^{-2}^{\circ}C^{-1}$ 정도로 주변지지구조보다 1/10정도 작게 나타났다.

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Formation and Characteristics of the Fluorocarbonated SiOF Film by $O_2$/FTES-Helicon Plasma CVD Method

  • Kyoung-Suk Oh;Min-Sung Kang;Chi-Kyu Choi;Seok-Min Yun
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 1998년도 제14회 학술발표회 논문개요집
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    • pp.77-77
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    • 1998
  • Present silicon dioxide (SiOz) 떠m as intennetal dielectridIMD) layers will result in high parasitic c capacitance and crosstalk interference in 비gh density devices. Low dielectric materials such as f f1uorina뼈 silicon oxide(SiOF) and f1uoropolymer IMD layers have been tried to s이ve this problem. I In the SiOF ftlm, as fluorine concentration increases the dielectric constant of t뼈 film decreases but i it becomes unstable and wa않r absorptivity increases. The dielectric constant above 3.0 is obtain어 i in these ftlms. Fluoropolymers such as polyte$\sigma$따luoroethylene(PTFE) are known as low dielectric c constant (>2.0) materials. However, their $\alpha$)Or thermal stability and low adhesive fa$\pi$e have h hindered 야1리ru뚱 as IMD ma따"ials. 1 The concept of a plasma processing a찌Jaratus with 비gh density plasma at low pressure has r received much attention for deposition because films made in these plasma reactors have many a advantages such as go여 film quality and gap filling profile. High ion flux with low ion energy in m the high density plasma make the low contamination and go어 $\sigma$'Oss피lked ftlm. Especially the h helicon plasma reactor have attractive features for ftlm deposition 야~au똥 of i앙 high density plasma p production compared with other conventional type plasma soun:es. I In this pa야Jr, we present the results on the low dielectric constant fluorocarbonated-SiOF film d밑JOsited on p-Si(loo) 5 inch silicon substrates with 00% of 0dFTES gas mixture and 20% of Ar g gas in a helicon plasma reactor. High density 띠asma is generated in the conventional helicon p plasma soun:e with Nagoya type ill antenna, 5-15 MHz and 1 kW RF power, 700 Gauss of m magnetic field, and 1.5 mTorr of pressure. The electron density and temperature of the 0dFTES d discharge are measUI벼 by Langmuir probe. The relative density of radicals are measured by optic허 e emission spe따'Oscopy(OES). Chemical bonding structure 3I피 atomic concentration 따'C characterized u using fourier transform infrared(FTIR) s야3띠"Oscopy and X -ray photonelectron spl:’따'Oscopy (XPS). D Dielectric constant is measured using a metal insulator semiconductor (MIS;AVO.4 $\mu$ m thick f fIlmlp-SD s$\sigma$ucture. A chemical stoichiome$\sigma$y of 야Ie fluorocarbina$textsc{k}$영-SiOF film 따~si야영 at room temperature, which t the flow rate of Oz and FTES gas is Isccm and 6sccm, res야~tvely, is form려 야Ie SiouFo.36Co.14. A d dielec$\sigma$ic constant of this fIlm is 2.8, but the s$\alpha$'!Cimen at annealed 5OOt: is obtain려 3.24, and the s stepcoverage in the 0.4 $\mu$ m and 0.5 $\mu$ m pattern 킹'C above 92% and 91% without void, res야~tively. res야~tively.

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입체표면 폴리실리콘 전극에서 PECVD $Ta_2O_5$ 유전박막의 전기적 특성 (Electrical Characteristics of PECVD $Ta_2O_5$ Dielectic Thin Films on HSG and Rugged Polysilicon Electrodes)

  • 조영범;이경우;천희곤;조동율;김선우;김형준;구경완;김동원
    • 한국진공학회지
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    • 제2권2호
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    • pp.246-254
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    • 1993
  • DRAM 커패시터에서 축정용량을 증대시키기 위한 기초연구로서 2가지 방법을 시도하였다. 첫째로, 커패시터의 유효 표면적을 증대시키기 위해 HSG(hemispherical grain)와 rugged 형태의 표면형상을 갖는 폴리실리콘 전극을 저압 화학기상증착법을 이용하여 제잘하였다. 그 결과 기존의 평평한 폴리실리콘 전극에 비하여 유효면적이 증대된 폴리실리콘 전극이 형성되었다. 둘째로, 고유 전상수를 갖는 $Ta_2O_5$ 박막을 각각의 전극에 플라즈마 화학기상증착법으로 증착시키고 후열처리한 후 전기적 특성변화를 조사하였다. MIS(metal-insulator-semiconductor) 구조의 커패시터를 제작하여 전기적 특성을 측정한 결과, HSG와 rugged 형상의 표면을 갖는 전극에서 기존의 평평한 표면을 갖는 전극에 비하여 축전용량은 1.2~1.5배까지 증대하였으나, 주설전류는 표면적의 증가에 따라 함께 증가함을 보였다. TDDB 특성에서도 HSG와 rugged 형상의 표면을 갖는 전극들이 평평한 표면형상에 비하여 더 열화되었음을 보여주었다. 이상과 같은 결과는 $Ta_2O_5$ 유전박막을 이용한 차세대 DRAB 커패시터 연구에 기초자료로 이용될 수 있을 것으로 본다.

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SOI 슬롯 광 도파로를 활용한 2×2 Balanced-Bridge Mach-Zehnder 간섭형 집적광학 바이오케미컬 센서 설계 및 성능평가 (Design and Performance Evaluation on 2×2 Balanced-Bridge Mach-Zehnder Interferometric Integrated-Optical Biochemical Sensors using SOI Slot Optical Waveguides)

  • 정홍식
    • 센서학회지
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    • 제32권4호
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    • pp.223-231
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    • 2023
  • An integrated-optical biochemical sensor structure that can perform homogeneous and surface sensing using a 2×2 balanced-bridge Mach-Zehnder interference structure based on the optimized SOI slot optical waveguide was described, and its performance and characteristics were evaluated. Equations for the two output optical powers were derived and examined using the transfer matrices of a 3-dB coupler and phase shifter (channel waveguide). The length of the 3-dB coupler was determined such that the two output optical powers were same using these formulas. In homogeneous sensing, the effect of the refractive index of an analyte in the range of 1.33-1.36 on the two output optical power distributions was numerically derived, and the sensitivity was calculated based on each output and the difference between the two outputs, the former and the latter being 7.5796-19.0305 [au/RIU] and 15.2601-38.1351 [au/RIU], respectively. In the case of surface sensing, the sensitivity range of the refractive index of 1.337 based on each of the two outputs was calculated as -2.2490--3.5854 [au/RIU] and 1.2194-3.8012 [au/RIU], and the sensitivity range of 4.8048-7.0694 [au/RIU] was confirmed based on the difference between the two outputs.

3D Lithography using X-ray Exposure Devices Integrated with Electrostatic and Electrothermal Actuators

  • Lee, Kwang-Cheol;Lee, Seung S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제2권4호
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    • pp.259-267
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    • 2002
  • We present a novel 3D fabrication method with single X-ray process utilizing an X-ray mask in which a micro-actuator is integrated. An X-ray absorber is electroplated on the shuttle mass driven by the integrated micro-actuator during deep X-ray exposures. 3D microstructures are revealed by development kinetics and modulated in-depth dose distribution in resist, usually PMMA. Fabrication of X-ray masks with integrated electrothermal xy-stage and electrostatic actuator is presented along with discussions on PMMA development characteristics. Both devices use $20-\mu\textrm{m}$-thick overhanging single crystal Si as a structural material and fabricated using deep reactive ion etching of silicon-on-insulator wafer, phosphorous diffusion, gold electroplating, and bulk micromachining process. In electrostatic devices, $10-\mu\textrm{m}-thick$ gold absorber on $1mm{\times}1mm$ Si shuttle mass is supported by $10-\mu\textrm{m}-wide$, 1-mm-long suspension beams and oscillated by comb electrodes during X-ray exposures. In electrothermal devices, gold absorber on 1.42 mm diameter shuttle mass is oscillated in x and y directions sequentially by thermal expansion caused by joule heating of the corresponding bent beam actuators. The fundamental frequency and amplitude of the electrostatic devices are around 3.6 kHz and $20\mu\textrm{m}$, respectively, for a dc bias of 100 V and an ac bias of 20 VP-P (peak-peak). Displacements in x and y directions of the electrothermal devices are both around $20{\;}\mu\textrm{m}$at 742 mW input power. S-shaped and conical shaped PMMA microstructures are demonstrated through X-ray experiments with the fabricated devices.

웨이퍼 레벨 공정이 가능한 2축 수직 콤 구동 방식 마이크로미러 (Wafer-Level Fabrication of a Two-Axis Micromirror Driven by the Vertical Comb Drive)

  • 김민수;유병욱;진주영;전진아;;박재형;김용권
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 Techno-Fair 및 추계학술대회 논문집 전기물성,응용부문
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    • pp.148-149
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    • 2007
  • We present the design and fabrication prcoess of a two-axis tilting micromirror device driven by the electrostatic vertical comb actuator. A high aspect-ratio comb actuator is fabricated by multiple DRIE process in order to achieve large scan angle. The proposed fabrication process enables a mirror to be fabricated on the wafer-scale. By bonding a double-side polished (DSP) wafer and a silicon-on-insulator (SOI) wafer together, all actuators on the wafer are completely hidden under the reflectors. Nickel lines are embedded on a Pyrex wafer for the electrical access to numerous electrodes of mirrors. An anodic bonding step is implemented to contact electrical lines with ail electrodes on the wafer at a time. The mechanical angle of a fabricated mirror has been measured to be 1.9 degree and 1.6 degree, respectively, in the two orthogonal axes under driving voltages of 100 V. Also, a $8{\times}8$ array of micromirrors with high fill-factor of 70 % is fabricated by the same fabrication process.

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$CaF_2$ 박막의 전기적, 구조적 특성 (Eelctrical and Structural Properties of $CaF_2$Films)

  • 김도영;최석원;이준신
    • 한국전기전자재료학회논문지
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    • 제11권12호
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    • pp.1122-1127
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    • 1998
  • Group II-AF_2$films such as $CaF_2$, $SrF_2$, and $BaF_2$ have been commonly used many practical applications such as silicon on insulatro(SOI), three-dimensional integrated circuits, buffer layers, and gate dielectrics in filed effect transistor. This paper presents electrical and structural properties of fluoride films as a gate dielectric layer. Conventional gate dielectric materials of TFTs like oxide group exhibited problems on high interface trap charge density($D_it$), and interface state incorporation with O-H bond created by mobile hydrogen and oxygen atoms. To overcome such problems in conventional gate insulators, we have investigated $CaF_2$ films on Si substrates. Fluoride films were deposited using a high vacuum evaporation method on the Si and glass substrate. $CaF_2$ films were preferentially grown in (200) plane direction at room temperature. We were able to achieve a minimum lattice mismatch of 0.74% between Si and $CaF_2$ films. Average roughness of $CaF_2$ films was decreased from 54.1 ${\AA}$ to 8.40 ${\AA}$ as temperature increased form RT and $300^{\circ}C$. Well fabricated MIM device showed breakdown electric field of 1.27 MV/cm and low leakage current of $10^{-10}$ A/$cm^2$. Interface trap charge density between $CaF_2$ film and Si substrate was as low as $1.8{\times}10^{11}cm^{-2}eV^{-1}$.

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PLASMA POLYMERIZED THIN FILMS GROWN BY PECVD METHOD AND COMPARISON OF THEIR ELECTROCHEMICAL PROPERTIES

  • I.S. Bae;S.H. Cho;Park, Z. T.;Kim, J.G.;B. Y. Hong;J.H. Boo
    • 한국표면공학회:학술대회논문집
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    • 한국표면공학회 2003년도 추계학술발표회초록집
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    • pp.119-119
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    • 2003
  • Plasma polymerized organic thin films were deposited on Si(100) glass and Copper substrates at 25 ∼ 100 $^{\circ}C$ using cyclohexane and ethylcyclohexane precursors by PECVD method. In order to compare physical and electrochemical properties of the as-grown thin films, the effects of the RF plasma power in the range of 20∼50 W and deposition temperature on both corrosion protection efficiency and physical properties were studied. We found that the corrosion protection efficiency (P$\_$k/), which is one of the important factors for corrosion protection in the interlayer dielectrics of microelectronic devices application, was increased with increasing RF power. The highest P$\_$k/ value of plasma polymerized ethylcyclohexane film (92.1% at 50 W) was higher than that of the plasma polymerized cyclohexane film (85.26% at 50 W), indicating inhibition of oxygen reduction. Impedance analyzer was utilized for the determination of I-V curve for leakage current density and C-V for dielectric constants. To obtain C-V curve, we used a MIM structure of metal(Al)-insulator(plasma polymerized thin film)-metal(Pt) structure. Al as the electrode was evaporated on the ethylcyclohexane films that grew on Pt coated silicon substrates, and the dielectric constants of the as-grown films were then calculated from C-V data measured at 1㎒. From the electrical property measurements such as I-V ana C-V characteristics, the minimum dielectric constant and the best leakage current of ethylcyclohexane thin films were obtained to be about 3.11 and 5 ${\times}$ 10$\^$-12/ A/$\textrm{cm}^2$ and cyclohexane thin films were obtained to be about 2.3 and 8 ${\times}$ 10$\^$-12/ A/$\textrm{cm}^2$.

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CHARACTERISTICS OF HETEROEPITAXIALLY GROWN $Y_2$O$_3$ FILMS BY r-ICB FOR VLSI

  • Choi, S.C.;Cho, M.H.;Whangbo, S.W.;Kim, M.S.;Whang, C.N.;Kang, S.B.;Lee, S.I.;Lee, M.Y.
    • 한국표면공학회지
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    • 제29권6호
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    • pp.809-815
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    • 1996
  • $Y_2O_3$-based metal-insulator-semiconductor (MIS) structure on p-Si(100) has been studied. Films were prepared by UHV reactive ionized cluster beam deposition (r-ICBD) system. The base pressure of the system was about $1 \times 10^{-9}$ -9/ Torr and the process pressure $2 \times 10^{-5}$ Torr in oxygen ambience. Glancing X-ray diffraction(GXRD) and in-situ reflection high energy electron diffracton(RHEED) analyses were performed to investigate the crystallinity of the films. The results show phase change from amorphous state to crystalline one with increasingqr acceleration voltage and substrate temperature. It is also found that the phase transformation from $Y_2O_3$(111)//Si(100) to $Y_2O_3$(110)//Si(100) in growing directions takes place between $500^{\circ}C$ and $700^{\circ}C$. Especially as acceleration voltage is increased, preferentially oriented crystallinity was increased. Finally under the condition of above substrate temperature $700^{\circ}C$ and acceleration voltage 5kV, the $Y_2O_3$films are found to be grown epitaxially in direction of $Y_2O_3$(1l0)//Si(100) by observation of transmission electron microscope(TEM). Capacitance-voltage and current-voltage measurements were conducted to characterize Al/$Y_2O_3$/Si MIS structure with varying acceleration voltage and substrate temperature. Deposited $Y_2O_3$ films of thickness of nearly 300$\AA$ show that the breakdown field increases to 7~8MV /cm at the same conditon of epitaxial growing. These results also coincide with XPS spectra which indicate better stoichiometric characteristic in the condition of better crystalline one. After oxidation the breakdown field increases to 13MV /cm because the MIS structure contains interface silicon oxide of about 30$\AA$. In this case the dielectric constant of only $Y_2O_3$ layer is found to be $\in$15.6. These results have demonstrated the potential of using yttrium oxide for future VLSI/ULSI gate insulator applications.

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