• 제목/요약/키워드: silicon electrode

검색결과 396건 처리시간 0.025초

다공질 실리콘을 이용한 전계 방출 소자

  • 주병권
    • 한국마이크로전자및패키징학회:학술대회논문집
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    • 한국마이크로전자및패키징학회 2002년도 춘계 기술심포지움 논문집
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    • pp.92-97
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    • 2002
  • We establish a visible light emission from porous polycrystalline silicon nano structure(PPNS). The PPNS layer are formed on heavily doped n-type Si substrate. 2um thickness of undoped polycrystalline silicon deposited using LPCVD (Low Pressure Chemical Vapor Deposition) anodized in a HF: ethanol(=1:1) as functions of anodizing conditions. And then a PPNS layer thermally oxidized for 1 hr at $900 ^{\circ}C$. Subsequently, thin metal Au as a top electrode deposited onto the PPNS surface by E-beam evaporator and, in order to establish ohmic contact, an thermally evaporated Al was deposited on the back side of a Si-substrate. When the top electrode biased at +6V, the electron emission observed in a PPNS which caused by field-induces electron emission through the top metal. Among the PPNSs as functions of anodization conditions, the PPNS anodized at a current density of $10mA/cm^2$ for 20 sec has a lower turn-on voltage and a higher emission current. Furthermore, the behavior of electron emission is uniformly maintained.

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대칭구동기를 갖는 가변 광 감쇄기의 제작 (VOA fabrication with symmetric actuator)

  • 김태엽;허재성;문성욱;신현준;이상렬
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2003년도 하계학술대회 논문집 C
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    • pp.1912-1913
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    • 2003
  • This paper presents a variable optical attenuator (VOA) that is fabricated using bosch deep silicon etching process [1] with silicon-on- insulator (SOI) wafer. The VOA consists of driving electrode, ground electrode, actuating mirror, and mechanical slower. In this VOA, actuating mirror is driven by electrostatic force [2] and the pull-in voltage is close to 13V, 28 V, 46V come along with the spring width of $3{\mu}m,\;5{\mu}m,\;7{\mu}m$ respectively.

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반응성 플라즈마를 이용한 태양전지용 Si기판의 표면 처리 (Surface treatment of Si wafer for solar cell using reactive plasma method)

  • 박병욱;곽동주;성열문
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.1305-1306
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    • 2007
  • To lower the fabrication cost of silicon solar cells, a surface treatment using a dielectric barrier discharge instead of a wet cleaning technique was examined on electrode surfaces on silicon solar cells. The fill factor obtained through measuring current-voltage characteristics was evaluated, and the treated surface state was characterized by energy-dispersive X-ray. It was found that the dielectric barrier discharge effectively activated the electrode surface and the surface treatment on finger electrodes contributed greatly to improve the fill factor.

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기판접합기술을 이용한 두꺼운 백플레이트와 수직음향구멍을 갖는 정전용량형 마이크로폰의 설계와 제작 (Design and fabrication of condenser microphone with rigid backplate and vertical acoustic holes using DRIE and wafer bonding technology)

  • 권휴상;이광철
    • 센서학회지
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    • 제16권1호
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    • pp.62-67
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    • 2007
  • This paper presents a novel MEMS condenser microphone with rigid backplate to enhance acoustic characteristics. The MEMS condenser microphone consists of membrane and backplate chips which are bonded together by gold-tin (Au/Sn) eutectic solder bonding. The membrane chip has 2.5 mm${\times}$2.5 mm, $0.5{\mu}m$ thick low stress silicon nitride membrane, 2 mm${\times}$2 mm Au/Ni/Cr membrane electrode, and $3{\mu}m$ thick Au/Sn layer. The backplate chip has 2 mm${\times}$2 mm, $150{\mu}m$ thick single crystal silicon rigid backplate, 1.8 mm${\times}$1.8 mm backplate electrode, and air gap, which is fabricated by bulk micromachining and silicon deep reactive ion etching. Slots and $50-60{\mu}m$ radius circular acoustic holes to reduce air damping are also formed in the backplate chip. The fabricated microphone sensitivity is $39.8{\mu}V/Pa$ (-88 dB re. 1 V/Pa) at 1 kHz and 28 V polarization voltage. The microphone shows flat frequency response within 1 dB between 20 Hz and 5 kHz.

기판접합기술을 이용한 MEMS 컨덴서 마이크로폰의 설계와 제작 (Design and Fabrication of MEMS Condenser Microphone Using Wafer Bonding Technology)

  • 권휴상;이광철
    • 한국소음진동공학회논문집
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    • 제16권12호
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    • pp.1272-1278
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    • 2006
  • This paper presents a novel MEMS condenser microphone with rigid backplate to enhance acoustic characteristics. The MEMS condenser microphone consists of membrane and backplate chips which are bonded together by gold-tin(Au/Sn) eutectic solder bonding. The membrane chip has $2.5mm{\times}2.5mm$, 0.5${\mu}m$ thick low stress silicon nitride membrane, $2mm{\times}2mm$ Au/Ni/Cr membrane electrode, and 3${\mu}m$ thick Au/Sn layer. The backplate chip has $2mm{\times}2mm$, 150${\mu}m$ thick single crystal silicon rigid backplate, $1.8mm{\times}1.8mm$ backplate electrode, and air gap, which is fabricated by bulk micromachining and silicon deep reactive ion etching. Slots and $50{\sim}60{\mu}m$ radius circular acoustic holes to reduce air damping are also formed in the backplate chip. The fabricated microphone sensitivity is 39.8 ${\mu}V/Pa$(-88 dB re. 1 V/Pa) at 1 kHz and 28 V polarization voltage. The microphone shows flat frequency response within 1 dB between 20 Hz and 5 kHz.

실리콘박막의 증착시간에 따른 감마계수 측정법 개발 (Measurement of Secondary Electron Emission Coefficient on Deposition Time of the Silicon Thin Films)

  • 이중휘;최병정;양성채
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 추계학술대회 논문집 Vol.19
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    • pp.330-331
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    • 2006
  • Recently, plasma display panels (PDPs) are highlighted for the flat type display device. Therefore, much attention has been paid to secondary electron emission coefficient of the electrode protective material of PDPs. As PDPs is developing, the concern about secondary electron emission coefficient ($\gamma$) which is related with PDPs electrode protection material is increasing continually. So the concern about the way to how to measure secondary electron emission coefficient is on the rise. At present, the way to how to measure secondary electron emission coefficient is developed by some research groups, which is giving some research part's advance help. In this research, we have studied how to measure secondary electron emission coefficient which is related with various thin films more conveniently than previous measurement method. We studied the method of measurement of secondary electron emission coefficient (${\gamma}$) of amorphous silicon films by using Paschen's curve.

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다결정 다공질 실리콘 나노구조의 전계 방출 특성 (Field Emission properties of Porous Polycrystalline silicon Nano-Structure)

  • 이주원;김훈;박종원;이윤희;장진;주병권
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2002년도 춘계학술대회 논문집 디스플레이 광소자 분야
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    • pp.69-72
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    • 2002
  • We establish a visible light emission from porous polycrystalline silicon nano structure(PPNS). The PPNS layer are formed on heavily doped n-type Si substrate. 2um thickness of undoped polycrystalline silicon deposited using LPCVD (Low Pressure Chemical Vapor Deposition) anodized in a HF: ethanol(=1:1) as functions of anodizing conditions. And then a PPNS layer thermally oxidized for 1 hr at $900^{\circ}C$. Subsequently, thin metal Au as a top electrode deposited onto the PPNS surface by E-beam evaporator and, in order to establish ohmic contact, an thermally evaporated Al was deposited on the back side of a Si-substrate. When the top electrode biased at +6V, the electron emission observed in a PPNS which caused by field-induces electron emission through the top metal. Among the PPNSs as functions of anodization conditions, the PPNS anodized at a current density of $10mA/cm^{2}$ for 20 sec has a lower turn-on voltage and a higher emission current. Furthermore, the behavior of electron emission is uniformly maintained.

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Gravure off-set 인쇄법을 적용한 고효율 다결정 실리콘 태양전지 (Gravure off-set printing method for the high-efficiency multicrystalline-silicon solar cell)

  • 김동주;김정모;배소익;전태현;송하철
    • 한국태양에너지학회:학술대회논문집
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    • 한국태양에너지학회 2011년도 춘계학술발표대회 논문집
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    • pp.293-298
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    • 2011
  • The most widely used method to form an electrode in industrial solar cells are screen printing. Screen printing is characterized by a relatively simple and well-known production sequence with high throughput rates. However the method is difficult to implement a fine line width of high-efficiency solar cells can not be made. The open circuit voltage(Voc) and the short circuit current density(Jsc) and fill factor(FF) need to be further improved to increase the efficiency of silicon solar cells. In this study, gravure offset printing method using the multicrystalline-silicon solar cells were fabricated. Gravure off-set printing method which can print the fine line width of finger electrode can have the ability reduce the shaded area and increase the Jsc. Moreover it can make a high aspect ratio thereby series resistance is reduced and FF is increased. Approximately $50{\mu}m$ line width with $35{\mu}m$ height was achieved. The efficiency of gravure off set was 0.7% higher compare to that of scree printing method.

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반도체 웨이퍼의 오존 수(水) 세정을 위한 고농도 오존발생장치 특성 연구 (A Study on the Characteristics of the High Concentration Ozone Generator for the Semiconductor Wafer Cleaning with the Ozone Dissolved De-ionized Water)

  • 손영수;함상용;문세호
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제52권12호
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    • pp.579-585
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    • 2003
  • Recently the utilization of the ozone dissolved de-ionized water(DI-O3 water) in semiconductor wet cleaning process to replace the conventional RCA methods has been studied. In this paper, we propose the water-electrode type ozone generator which has the ozone gas characteristics of the high concentration and high purity to produce the high concentration DI-O3 water for the silicon wafer surface cleaning process. The ozone generator has the dual dielectric tube structure of silent discharge type and the water is both used to electrode and cooling water. We investigate the performance of the proposed ozone generator which has the design goal of the concentration of 7[wt%] and ozone generation quantity of 6[g/hr] at flow rate of 1[$\ell$/min). The experiment results show that the water electrode type ozone generator has the characteristics of 8.48[wt%] of concentration, 8.08[g/hr] of generation quantity and 76.2[g/kWh] of yield and it's possible to use the proposed ozone generator for the DI-O3 water cleaning process of silicon wafer surface.

실리콘 광도파로, 미소거물 및 접촉식 정 전구동기가 집적된 광스위치 (An Optical Microswitch Integrated with Silicon Waveguides, Micromirrors, and Electrostatic Touch-Down Beam Actuators)

  • 진영현;서경선;조영호;이상신;송기창;부종욱
    • 대한전기학회논문지:전기물성ㆍ응용부문C
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    • 제50권12호
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    • pp.639-647
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    • 2001
  • We present an integrated optical microswitch, composed of silicon waveguides, gold-coaled silicon micromirrors, and electrostatic contact actuators, for applications to the optical signal transceivers. For a low switching voltage, we modify the conventional curled electrode microactuator into a electrostatic microactuator with touch-down beams. We fabricate the silicon waveguides and the electrostatically actuated micromirrors using the ICP etching process of SOI wafers. We observe the single mode wave propagation through the silicon waveguide with the measured micromirror loss of $4.18\pm0.25dB$. We analyze major source of the micromirror loss, thereby presenting guidelines for low-loss micromirror designs. From the fabricated microswitch, we measure the switching voltage of 31.74V at the resonant frequency of 6.89kHz. Compared to the conventional microactuator, the present contact microactuator achieves 77.4% reduction of the switching voltage. We also discuss a feasible method to reduce the switching voltage to 10V level by using the electrode insulation layers having the residual stress less than 30MPa.

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