• Title/Summary/Keyword: signal-to-signal conversion

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Estimation of acceleration by noise rejection from velocity signals using Smoothing technique (Smoothing 기법을 이용한 속도신호의 노이즈제거 및 가속도 추정)

  • Lee K. W;Kim M. R;Ohn J. G;Hong Y. K
    • Proceedings of the KSR Conference
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    • 2003.10c
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    • pp.247-251
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    • 2003
  • The velocity of train which is measured from pulse generator attached to TM is used for displaying or control signal of inverter and so on. Measured signals increase and decrease step-by-step by pulse counting or monotonously by F/V conversion. But noises and signal distortions by measuring error like alias make it difficult to provide correct velocity infomation and estimate the acceleration. In this paper, we investigated the performance of Smoothing method for suppressing the noises in velocity signals. And the difference between Smoothed signal and origin velocity signals is inspected and the comparison with low pass filtering show applicable of Smoothing method for noise rejection and the estimation of signal. Finally, acceleration curves estimated from Smoothing method are compared with real accelerator signal attached to train.

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Time-to-Digital Converter Using Synchronized Clock with Start and Stop Signals (시작신호 및 멈춤신호와 동기화된 클록을 사용하는 시간-디지털 변환기)

  • Choi, Jin-Ho
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.5
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    • pp.893-898
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    • 2017
  • A TDC(Time-to-Digital Converter) of counter-type is designed by $0.18{\mu}mCMOS$process and the supply voltage is 1.5 volts. The converted error of maximum $T_{CK}$ is occurred by the time difference between the start signal and the clock when the period of clock is $T_{CK}$ in the conventional TDC. And the converted error of -$T_{CK}$ is occurred by the time difference between the stop signal and the clock. However in order to compensate the disadvantage of the conventional TDC the clock is generated within the TDC circuit and the clock is synchronized with the start and stop signals. In the designed TDC circuit the conversion error is not occurred by the difference between the start signal and the click and the magnitude of conversion error is reduced (1/2)$T_{CK}$ by the time difference between the stop signal and the clock.

Multi-biological Signal-based Smart Trigger System for Cardiac MRI (다중 생체 신호를 이용한 심장 자기공명영상 스마트 트리거 시스템)

  • Yang, Young-Joong;Park, Jinho;Hong, Hye-Jin;Ahn, Chang-Beom
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.63 no.7
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    • pp.945-949
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    • 2014
  • In cardiac magnetic resonance imaging (CMRI), heart and respiratory motions are one of main obstacles in obtaining diagnostic quality of images. To synchronize CMRI to the physiological motions, ECG and respiratory gatings are commonly used. In this paper multi-biological signal (ECG, respiratory, and SPO2) based smart trigger system is proposed. By using multi-biological signal, the proposed system is robust to the induced noise such as eddy current when gradient pulsing is continuously applied during the examination. Digital conversion of the multi-biological signal makes the system flexible in implementing smart and intelligent algorithm to detect cardiac and respiratory motion and to reject arrhythmia of the heart. The digital data is used for real-time trigger, as well as signal display, and data storage which may be used for retrospective signal processing.

Design of A High-Speed Current-Mode Analog-to-Digital Converter (고속 전류 구동 Analog-to-digital 변환기의 설계)

  • 조열호;손한웅;백준현;민병무;김수원
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.7
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    • pp.42-48
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    • 1994
  • In this paper, a low power and high speed flash Analog-to-Digital Converter using current-mode concept is proposed. Current-mode approach offers a number of advantages over conventional voltage-mode approach, such as lower power consumption small chip area improved accuracy etc. Rescently this concept was applied to algorithmic A/D Converter. But, its conversion speed is limited to medium speed. Consequently this converter is not applicable to the high speed signal processing system. This ADC is fabricated in 1.2um double metal CMOS standard process. This ADC's conversion time is measured to be 7MHz, and power consumption is 2.0mW, and differential nonlinearity is less than 1.14LSB and total harmonic distortion is -50dB. The active area of analog chip is about 350 x 550u$m^2$. The proposed ADC seems suitable for a single chip design of digital signal processing system required high conversion speed, high resolution small chip area and low power consumption.

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Laser Phase Noise to Electronic Phase Noise Conversion in Optical Links Comprising Optical Resonators

  • Wang, Ziye;Yang, Chun;Xu, Weijie
    • Current Optics and Photonics
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    • v.2 no.5
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    • pp.395-399
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    • 2018
  • This article investigates the mechanism of electronic signal phase noise degradation induced by laser phase noise in optical links comprising optical resonators. Through theoretical derivation, we find that the phase noise of the output electronic signal has the same spectral shape of optical intensity noise as the output of the optical resonator. We propose that the optical resonator transfers laser phase noise to light intensity fluctuation and then the intensity fluctuation is converted to electric phase noise through AM-PM conversion mechanism in the photodiode. An optical link comprising a Fabry-Perot resonator was constructed to verify the proposed mechanism. The experimental results agree with our theoretical prediction verifying that the supposition is correct.

Design of Sub-Harmonics Pumped Ring Mixer (SHP 링혼합기 설계)

  • 김갑기;박용식;최충연;최병하
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.8
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    • pp.1392-1398
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    • 2000
  • In this paper, Sub Harmonic Ring Mixer using Anti-Parallel Diode Pair is studied. Conventional mixers mix LO signal with RF signal and, obtain IF signal from the difference between LO and RF. Sub harmonic ring mixers using APDP mix RF signal with the second harmonic of LO signal, LO frequency needed for conventional receiver is reduced by 1/2.The produced mixer showed 12 dB conversion loss, and 1 dB compression point of IF signal, in respect to RF signal, was found at the 0 dBm RF signal. Isolation LO/IF and LO/RF is 24.6 dB and 22.5 dB respectively. Isolation RF/LO and LO/RF is 32.6 dB and 22.5 dB respectively.

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A Study on Design and Implementation of Hangul-NAVTEX Simulator (한글 NAVTEX시뮬레이터 설계 및 구현에 관한 연구)

  • 이헌택;김기문
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.3 no.4
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    • pp.819-830
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    • 1999
  • NAVTEX system is an international automated direct-printing service, broadcast on 5181kHz and 490kHz, for the promulgation of navigational and meteorological warnings and urgent information to ships. With our government's adoption of the international convention for SAR(Search and Rescue) in 1993, various trials for the installation of NAVTEX system have been executed by the government committee, relating laboratory and experts. An important consideration of the installation for NAVTEX system is the availability that could broadcast messages written in korean letter. Also, the receiver which can process the signal demodulated from the two frequencies, 518kHz and 490kHz, should be developed and supplied in domestic. In this paper, the code table and algorithm for conversions between NAVTEX characters and Korean Letters are studied, and signal processing techniques of code conversion are developed. Circuit design and implementation of the NAVTEX simulator using the Direct Digital Synthesizer are discussed, code conversion algorithm and signal processing technique of the NAVTEX transmission are programmed in its circuits. For evaluating the its functional characteristics, receiving module which has I-Q channel structure is designed. From the measurements of simulator, the characteristics show the frequency stability of the $(\pm)2Hz$ and Spurious free dynamic range is -63dBc. And the simulator can generate simultaneously wanted signal and several interfere signals. So, its capability is valuable for designers of the transmitting system and NAVTEX receiver, for provider as testing facilities of the type approval.

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A Study on Noise Reduction Characteristics of Active Noise Controller Using Hysteresis Control Method (히스테리시스 제어 방식을 이용한 능동 소음 제어기의 소음저감 특성에 관한 연구)

  • 이승요;김홍성;최규하
    • The Transactions of the Korean Institute of Power Electronics
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    • v.2 no.2
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    • pp.35-40
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    • 1997
  • The hysteresis control method has been frequently used for current control of power conversion equipments or motor drive systems. This method makes the measured signal follow the reference signal by changing the control signal whenever the error signal exceeds the preset band width. In this paper, hysteresis control method with fast response characteristics is applied for active noise control to suppress acoustic noise. Both Pentium processor and sound blaster 16 are used for experimental implementation, which executes A/D, D/A conversion and also is used as operating source of loudspeaker for audible noise cancellation.

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Tunnel Diode Oscillator with a Moving Target as a Self-excited Mixer (이동물체 탐색을 위한 터넬다이오드 백여믹서)

  • Lee, Jong-Gak;Sim, Su-Bo;Yun, Hyeon-Bo
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.11 no.1
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    • pp.40-46
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    • 1974
  • This paper deals with the self-excited mixer using tunnel diode oscillator operated as a microwave source and Doppler signal detector. The system impedance, the oscillation condition and the frequency conversion theory including moving target are investigated. The oscillating frequency and the output of tunnel diode oscillator are 2.035 GHz and 0.1 mW. The input signal frequency which is equivalent to Doppler signal is lower than tunnel diode oscillator frequency by 125 MHz. TDe conversion loss has been investigated as a functicn of input signal level. This loss is greater than 67 db for the large pump mode.

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Optimal equivalent-time sampling for periodic complex signals with digital down-conversion

  • Kyung-Won Kim;Heon-Kook Kwon;Myung-Don Kim
    • ETRI Journal
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    • v.46 no.2
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    • pp.238-249
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    • 2024
  • Equivalent-time sampling can improve measurement or sensing systems because it enables a broader frequency band and higher delay resolution for periodic signals with lower sampling rates than a Nyquist receiver. Meanwhile, a digital down-conversion (DDC) technique can be implemented using a straightforward radio frequency (RF) circuit. It avoids timing skew and in-phase/quadrature gain imbalance instead of requiring a high-speed analog-to-digital converter to sample an intermediate frequency (IF) signal. Therefore, when equivalent-time sampling and DDC techniques are combined, a significant synergy can be achieved. This study provides a parameter design methodology for optimal equivalent-time sampling using DDC.