• Title/Summary/Keyword: signal processor circuit

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A Study on Microprocessor-Based 3-Phase VVVF Inverter (마이크로 프로세서를 사용한 3상 VVVF 인버터에 관한 연구)

  • 한상수;김재호;최우승
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.27 no.6
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    • pp.879-885
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    • 1990
  • The geometrical algorithm for generating a 3-phase SPWM signal for VVVF (Variable Voltage, Variable Frequency) inverter drives is proposed. In this techniques, it is suitable for micro-processor based implementation since the pulsewiths are computable in real time from simple analytic expressions. System hardware consists of the inverter circuit and the 3-phase SPWM signal generating circuit. The inverter circuit is a 3-phase SPWM signal generating circuit is single board micro-processor consisting of Z-80A CPU, EPROMXI, CTC, PIO. The method of controlling VVVF at the inverter output is discussed here.

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A Study on the Robust Real-Time Signal Processor of a Laser Doppler Vibrometer for Noises (노이즈에 둔감한 레이저 진동계측기용 실시간 신호처리 장치에 관한 연구)

  • Park, Seung-Kyu;Baik, Sung-Hoon;Kim, Cheol-Jung
    • Journal of the Korean Society for Precision Engineering
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    • v.16 no.1 s.94
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    • pp.61-67
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    • 1999
  • A laser Doppler vibrometer based on the laser heterodyne interferometry is employed to measure the vibration velocity of vibrating objects. In this paper, we propose a real time analog signal processor of a laser Doppler vibrometer to reduce the degradation of Doppler signals mainly caused by environmental noises. In the proposed real time signal processor of an laser Doppler vibrometer, a pre-processor and a logical motion direction detector are designed to reduce the detection errors of the object motion direction. Also, a noise detection and rejection circuit is designed to reject the unfiltered noises.

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Design and Fabrication of VTR Audio Signal Processor IC (VTR 음성신호 처리용 집적회로의 설계 및 제작)

  • Shin, Myung-Chul
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.24 no.4
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    • pp.618-624
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    • 1987
  • This paper describes the design and fabrication of a signal processing integrated circuit required for the recording and playback of VTR audio signal. The integrated circuit was designed using 8\ulcorner design rule and its chip size is 2.5x2.5mm\ulcorner It was fabricated using SST bipolar standard process technology. The measurement analysis of the fabricated circuit proves the satisfactory DC characteristics and its proper audio signal processing funcstion.

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Soft-Start Open Circuit Voltage and Constant Current Sequence Control of 2.5[kW] HID Search Lamp for Ship (선박용 2.5[kW] HID 탐사등의 Soft-Start 방식에 의한 개방회로 전압과 점등전류 순차 제어)

  • Park, Noh-Sik;Kwon, Soon-Jae;Lee, Dong-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.8
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    • pp.45-51
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    • 2008
  • HID(High Intensity Discharge) search lamp for shipment requires a high open circuit and output current compare than vehicle. This paper presents a soft-start open circuit voltage and constant current sequence control method for 2.5[kW] HID search lamp. The proposed method controls the opal circuit voltage and discharge current of HID lamp according to ignition signal with a simple 8-bit micro-processor and PWM device. For the stable control of lamp, micro-processor checks the output voltage and current. And the checked signals are compared with ignition signal and changes the control mode for stable operation. An ignition signal and micro-processor change the control mode from open circuit voltage contort to constant current control. The proposed control scheme is verified from experimental tests of 2.5[kW] HID search lamp for shipment.

The Performance Analysis of The Digital Trunk Circuit Processor in The TDX-1A (TDX-1A의 디지틀 중계선 정합 프로세서의 성능분석)

  • Ahn, Jee-Hwan;Park, Kwang-Ro;Lee, Yong-Kyun
    • Proceedings of the KIEE Conference
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    • 1988.07a
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    • pp.510-513
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    • 1988
  • This paper describes an effective trunk loop signal processing method and analyzes execution time of program in the DTCP(Digital Trunk Circuit Processor) in the TDX-1A digital switching system. To predict a maximum trunk capacity, also analyzes to Z80A system clock(4Mbit/s, 2.5Mbit/s) and scanning period(8mS,5mS) respectively.

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A Programmable Compensation Circuit for System-on-Chip Application

  • Choi, Woo-Chang;Ryu, Jee-Youl
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.3
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    • pp.198-206
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    • 2011
  • This paper presents a new programmable compensation circuit (PCC) for a System-on-Chip (SoC). The PCC is integrated with $0.18-{\mu}m$ BiCMOS SiGe technology. It consists of RF Design-for-Testability (DFT) circuit, Resistor Array Bank (RAB) and digital signal processor (DSP). To verify performance of the PCC we built a 5-GHz low noise amplifier (LNA) with an on-chip RAB using the same technology. Proposed circuit helps it to provide DC output voltages, hence, making the RF system chain automatic. It automatically adjusts performance of an LNA with the processor in the SoC when it goes out of the normal range of operation. The PCC also compensates abnormal operation due to the unusual PVT (Process, Voltage and Thermal) variations in RF circuits.

Development of the Digital Controller for High Precision Digital Power Supply (고정밀전원장치를 위한 디지털 제어기 개발)

  • Ha, K.M.;Lee, S.K.;Kim, Y.S.
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2006.06a
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    • pp.249-250
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    • 2006
  • In this paper, hardware design and implementation of digital controller for the High Precision Digital Power Supply (HPDPS) based on Digital Signal Processor (DSP) and Field Programmable Gate Array (FPGA) is presented. Developed digital controller is composed of high resolution Digital Pulse Width Modulation (DPWM) and high resolution analog to digital converter circuit with anti-aliasing filter. And Digital Signal Processor (DSP) has the capability of a few micro-second calculation time for one feedback loop. 32-bit DSP and DPWM with 150[ps] step resolution is used to implement the HPDPS. Also 18-bit 2 mega sample per second ADC board is adopted for the developed digital controller. Also, hardware structure of the developed digital controller and experimental results of the first prototype board for HPDPS is described.

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Direct Thrust Control of Permanent Magnet Linear Synchronous Motor using Digital Signal Processor (DSP를 이용한 영구 자석형 선형 동기전동기의 직접 추력 제어)

  • Kim, Duk-Jin;Woo, Kyung-Il;Kwon, Byung-Il;Park, Seung-Chan
    • Proceedings of the KIEE Conference
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    • 1999.11b
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    • pp.49-51
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    • 1999
  • The direct thrust control of permanent magnet linear synchronous motor using digital signal processor (DSP) is presented. The motor self inductance, the initial flux linkage by the permanent magnet is calculated in advance by the finite element analysis. The equivalent circuit method and the digital signal processor are used for the simulation and experiment, respectively. The simulation and experimental results such as, thrust, current and speed responses to the commands are examined.

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Direct Thrust Control of Permanent Magnet Type Linear Synchronous Motor by using Digital Signal Processor (DSP를 이용한 영구 자석형 선형 동기전동기의 직접 추력 제어)

  • U, Gyeong-Il;Kim, Deok-Jin;Gwon, Byeong-Il
    • The Transactions of the Korean Institute of Electrical Engineers B
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    • v.49 no.8
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    • pp.514-521
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    • 2000
  • This paper presents a direct thrust control scheme for permanent magnet linear synchronous motor(PMLSM) by using digital signal processor(DSP). And a simulation method for the direct thrust control of a permanent magnet linear synchronous motor using the equivalent circuit is presented. The detent force that was obtained by cubic spline method is considered in the simulation. Thrust correction coefficient is utilized to estimate actual thrust on the direct thrust control, which considers the longitudinal end effect due to the finite core length of the permanent magnet linear synchronous motor. The motor self inductance, the initial flux linkage by the permanent magnet is calculated in advance by the finite element analysis, and then the direct control simulation is carried out. As the results, thrust, current and speed are shwon.

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Hearing aid application of feedback cancellation algorithm in frequency domain (주파수 대역에서의 피드백 제거 알고리즘의 보청기 응용)

  • Jarng, Soon-Suck
    • The Journal of the Acoustical Society of Korea
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    • v.35 no.4
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    • pp.272-279
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    • 2016
  • In this paper, the realization of a hearing aid adaptively cancelling feedback noise was considered. Conventional least mean square method in time domain was transformed into frequency domain in order to minimize computational burden. The adaptive filter algorithm was evaluated by Matlab (Matrix laboratory), and it was confirmed by CSR 8675 Bluetooth DSP IC (Digital Signal Processor Integrated Circuit) chip firmware realization. Some remote control features by a smart phone was added to the smart hearing aid for user interface easiness.